• The nominal IDAC output for this application is 200 mA. The IDAC code required to set the IDAC output to 200 mA is calculated by Equation 9.

• The IDAC channel uses the internal reference. Enable the internal reference in the COMMON-CONFIG register before enabling the IDAC output.

• The power dissipation of the IDAC channel is a function of the PV_DD supply voltage, the current output, and the voltage of the IDAC pin (V_IDAC). The headroom voltage (V_HEADROOM) is calculated as the difference between PV_DD and V_IDAC. Minimize V_HEADROOM to reduce the power dissipation of the device while also meeting the minimum V_HEADROOM requirement. The IDAC output cannot source the full-scale current output if V_HEADROOM is lower than the specified voltage. Figure 8-2 shows the output current directions and the key voltages that impact power dissipation. The IDAC output contributes to power dissipation proportionally to the output current multiplied by the V_HEADROOM voltage.

Figure 8-2 IDAC Power Dissipation

• The VDAC full-scale output range is set in the DAC-0-GAIN-CONFIG register. This application example uses the 3.3-V VDD as the reference with a 1× gain. Equation 10 calculates the DAC code for a 2-V output.

• The inverting op-amp circuit in this application has a gain of –1 V/V. If the negative output range of the circuit needs to be greater than the AFEx32A3W V_DD supply voltage, the gain of the inverting op-amp circuit can be increased. The negative op-amp supply (V_SS) must be large enough to support the headroom requirement of the selected op-amp for the full-scale output of the AFEx32A3W with the selected gain applied. Select an op-amp that supports the output voltage range and output current drive required by the EAM.
• When using the ADC inputs to monitor a photodiode, the value of R_SENSE depends on the expected current of the photodiode (I_PD). Choose R_SENSE so that the maximum I_PD induces a voltage equal to the full-scale ADC input voltage. Equation 11 shows how to calculate R_SENSE from the maximum ADC input voltage and the maximum I_PD.

• The ADC full-scale input range is set in the DAC-1-GAIN-CMP-CONFIG register. This application example uses the 3.3-V V_DD as the reference with a 1× gain. If the expected maximum I_PD is 10 mA, R_SENSE is calculated to be 330 Ω by Equation 12.

• This application uses the GPIO/SDO pin to power the IDAC output on and off. Configure the function of the GPIO/SDO pin in the GPIO-CONFIG register. The GPI-EN bit enables the GPIO/SDO pin as an input. The GPI-CH-SEL field selects which channels are controlled by the GPI. The GPI-CONFIG field selects the GPI function. Table 6-9 defines the functions for the GPI-CONFIG field.

The pseudocode for an EML bias application is as follows:

//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>
//Write DAC code for nominal IDAC output
//Set IOUT gain setting to 2/3
WRITE DAC-2-GAIN-CONFIG(0x03), 0x00, 0x00
//The 10-bit hex code for 200 mA is 0x24A. With 16-bit left alignment, this becomes 0x9280
WRITE DAC-2-DATA(0x19), 0x92, 0x80
//Set VOUT0 gain setting to 1x VDD (3.3 V)
WRITE DAC-0-GAIN-CONFIG(0x0F), 0x04, 0x00
//For a 3.3-V output range, the 10-bit hex code for 2 V is 0x26D. With 16-bit left alignment, this becomes 0x9B40
WRITE DAC-0-DATA(0x1B), 0x9B, 0x40
//Set ADC gain setting to 1x VDD (3.3 V), enable comparator mode for ADC
WRITE DAC-1-GAIN-CMP-CONFIG(0x15), 0x04, 0x01 
//Power-up output on VDAC and ADC channels, enables internal reference 
WRITE COMMON-CONFIG(0x1F), 0x12, 0x5F 
//Configure GPI for Power-Up, Down trigger for IDAC channel
WRITE GPIO-CONFIG(0x24), 0x00, 0x29 
//Enable the ADC and configure the averaging setting and channel select
WRITE ADC-CONFIG-TRIG(0x1D), 0x23, 0xC0
//Save settings to NVM 
WRITE COMMON-TRIGGER(0x20), 0x00, 0x02

//Use GPIO pin to power on/off IDAC
//ADC trigger
WRITE ADC-CONFIG-TRIG(0x1D), 0x23, 0xC1
//ADC readback
READ ADC-DATA(0x1E)