JAJSRL6 November 2023 AFE432A3W , AFE532A3W
PRODUCTION DATA
Table 6-14 depicts the address byte, the first byte received from the controller device following the start condition. The first four bits (MSBs) of the address are factory preset to 1001b. The next three bits of the address are controlled by the A0 pin. The A0 pin input can be connected to VDD, AGND, SCL, or SDA. The A0 pin is sampled during the first byte of each data frame to determine the address. The device latches the value of the address pin, and consequently responds to that particular address according to Table 6-15.
COMMENT | MSB | LSB | ||||||
---|---|---|---|---|---|---|---|---|
— | AD6 | AD5 | AD4 | AD3 | AD2 | AD1 | AD0 | R/W |
General address | 1 | 0 | 0 | 1 | See Table 6-15 (target address column) | 0 or 1 | ||
Broadcast address | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
TARGET ADDRESS | A0 PIN |
---|---|
000 | AGND |
001 | VDD |
010 | SDA |
011 | SCL |
The AFEx32A3W supports broadcast addressing, which is used for synchronously updating or powering down multiple AFEx32A3W devices. When the broadcast address is used, the AFEx32A3W responds regardless of the address pin state. Broadcast is supported only in write mode.