JAJSPQ1 August   2024 AMC0106M05

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information (DEN Package)
    5. 5.5 Package Characteristics
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Modulator
      3. 6.3.3 Isolation Channel Signal Transmission
      4. 6.3.4 Digital Output
        1. 6.3.4.1 Output Behavior in Case of a Full-Scale Input
        2. 6.3.4.2 Output Behavior in Case of a Missing High-Side Supply
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Shunt Resistor Sizing
        2. 7.2.2.2 Input Filter Design
        3. 7.2.2.3 Bitstream Filtering
        4. 7.2.2.4 Designing the Bootstrap Supply
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.1 Analog Input

As shown in Figure 6-1, the input of the AMC0106M05 is a fully differential, switched-capacitor circuit with a dynamic input impedance of 6.25kΩ at 20MHz.

The sampling capacitor is continuously charged and discharged with a frequency of fCLK. With the S1 switches closed, CIND charges to the voltage difference across VINP and VINN. For the discharge phase, both S1 switches open first and then both S2 switches close. CIND discharges to approximately AGND + 0.8V during this phase.

AMC0106M05 Equivalent Input Circuit Figure 6-1 Equivalent Input Circuit

The analog input range is tailored to directly accommodate a voltage drop across a shunt resistor used for current sensing. There are two restrictions on the analog input signals (INP and INN). First, if the input voltage exceeds the input range specified in the 絶対最大定格 table, limit the input current to the absolute maximum value because the electrostatic discharge (ESD) protection turns on. Second, the linearity and noise performance of the device are specified only when the differential analog input voltage remains within the specified VFSR and VCM ranges. VFSR is the linear full-scale range and VCM is the input common-mode voltage range.