JAJSRW4 October   2024 AMC0386-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagrams
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Modulator
      3. 6.3.3 Isolation Channel Signal Transmission
      4. 6.3.4 Digital Output
        1. 6.3.4.1 Output Behavior in Case of a Fullscale Input
        2. 6.3.4.2 Output Behavior in Case of a Missing High-Side Supply
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Best Design Practices
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DFX|15
サーマルパッド・メカニカル・データ
発注情報

5.10 Switching Characteristics

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tH DOUT hold time after rising edge of CLKIN CLOAD = 15pF 10 ns
tD Rising edge of CLKIN to DOUT valid delay CLOAD = 15pF 35 ns
tr DOUT rise time 10% to 90%, 2.7V ≤ DVDD ≤ 3.6V, CLOAD = 15pF 2.5 6 ns
10% to 90%, 4.5V ≤ DVDD ≤ 5.5V, CLOAD = 15pF 3.2 6
tf DOUT fall time 10% to 90%, 2.7V ≤ DVDD ≤ 3.6V, CLOAD = 15pF 2.2 6 ns
10% to 90%, 4.5V ≤ DVDD ≤ 5.5V, CLOAD = 15pF 2.9 6
tSTART Device start-up time AVDD step from 0  to 3.0V with AVDD ≥ 2.7V to bitstream valid, 0.1% settling 100 µs