JAJS323D February   2008  – June 2024 AMC1203

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagram
    12. 5.12 Typical Characteristics
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Modulator
      3. 6.3.3 Digital Output
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Shunt Resistor Sizing
        2. 7.2.2.2 Input Filter Design
        3. 7.2.2.3 Bitstream Filtering
      3. 7.2.3 Application Curve
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.2.3 Bitstream Filtering

The modulator generates a bitstream that is processed by a digital filter. This process obtains a digital word similar to a conversion result of a conventional analog-to-digital converter (ADC). As described by Equation 2, a very simple filter built with minimal effort and hardware, is a sinc3-type filter:

Equation 2. H z = 1 - z - O S R 1 - z - 1 3

This filter provides the best output performance at the lowest hardware size (count of digital gates) for a second-order modulator. All characterization in this document is done with a sinc3 filter with a 256 oversampling ratio (OSR) and a 16-bit output word width, unless specified otherwise. The measured effective number of bits (ENOB) as a function of the OSR is illustrated in Figure 7-3 of the Typical Application section.

A delta sigma modulator filter calculator is available for download at www.ti.com. This calculator aids in filter design and selecting the right OSR and filter order to achieve the desired output resolution and filter response time.

The Combining the ADS1202 with an FPGA Digital Filter for Current Measurement in Motor Control Applications application note includes example code for implementing a sinc3 filter in an FPGA. This application note is available for download at www.ti.com.

For modulator output bitstream filtering, use a device from TI's C2000™ or Sitara™ microcontroller families. These families support up to eight channels of dedicated hardwired filter structures that significantly simplify system level design by offering two filtering paths per channel. One path provides high-accuracy results for the control loop and the other a fast-response path for overcurrent detection.