JAJSIJ6F
April 2011 – February 2020
AMC1204
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
デバイスのブロック図
4
改訂履歴
5
概要(続き)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Power Ratings
7.6
Insulation Specifications
7.7
Safety-Related Certifications
7.8
Safety Limiting Values
7.9
Electrical Characteristics
7.10
Timing Requirements
7.11
Insulation Characteristics Curves
7.12
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Input
8.3.2
Modulator
8.3.3
Digital Output
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Digital Filter Usage
9.2
Typical Application
9.2.1
Frequency Inverter Application
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
Example of a Resolver-Based Motor Control Analog Front End
9.2.3
Isolated Voltage Sensing
9.2.3.1
Design Requirements
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントのサポート
12.1.1
関連資料
12.2
ドキュメントの更新通知を受け取る方法
12.3
サポート・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DWV|8
MPDS382B
DW|16
MSOI003I
サーマルパッド・メカニカル・データ
DW|16
QFND505A
発注情報
jajsij6f_oa
jajsij6f_pm
7.12
Typical Characteristics
at AVDD = 5 V, DVDD = 3.3 V, VINP = –250 mV to 250 mV, VINN = 0 V, and sinc
3
filter with OSR = 256 (unless otherwise noted)
Figure 4.
Integral Nonlinearity vs Input Signal Amplitude
Figure 6.
Offset Error vs Analog Supply Voltage
Figure 8.
Offset Error vs Clock Frequency
Figure 10.
Gain Error vs Analog Supply Voltage
Figure 12.
Gain Error vs Clock Frequency
Figure 14.
Power-Supply Rejection Ratio vs Frequency
Figure 16.
SINAD and SNR vs Analog Supply Voltage
Figure 18.
SINAD and SNR vs Input Signal Frequency
Figure 20.
SINAD and SNR vs Clock Frequency
Figure 22.
Total Harmonic Distortion vs Analog Supply Voltage
Figure 24.
Total Harmonic Distortion vs Input Signal Frequency
Figure 26.
Total Harmonic Distortion vs Clock Frequency
Figure 28.
Spurious-Free Dynamic Range vs Analog Supply Voltage
Figure 30.
Spurious-Free Dynamic Range vs Input Signal Frequency
Figure 32.
Spurious-Free Dynamic Range vs Clock Frequency
Figure 34.
Frequency Spectrum (4096 Point FFT, f
IN
= 1 kHz, 0.56 V
PP
)
Figure 36.
Analog Supply Current vs Analog Supply Voltage
Figure 38.
Analog Supply Current vs Clock Frequency
Figure 40.
Digital Supply Current vs Digital Supply Voltage (5 V)
Figure 42.
Digital Supply Current vs Clock Frequency
Figure 5.
Integral Nonlinearity vs Temperature
Figure 7.
Offset Error vs Temperature
Figure 9.
Offset Error vs Clock Duty Cycle
Figure 11.
Gain Error vs Temperature
Figure 13.
Gain Error vs Clock Duty Cycle
Figure 15.
Common-Mode Rejection Ratio vs Input Signal Frequency
Figure 17.
SINAD and SNR vs Temperature
Figure 19.
SINAD and SNR vs Input Signal Amplitude
Figure 21.
SINAD and SNR vs Clock Duty Cycle
Figure 23.
Total Harmonic Distortion vs Temperature
Figure 25.
Total Harmonic Distortion vs Input Signal Amplitude
Figure 27.
Total Harmonic Distortion vs Clock Duty Cycle
Figure 29.
Spurious-Free Dynamic Range vs Temperature
Figure 31.
Spurious-Free Dynamic Range vs Input Signal Amplitude
Figure 33.
Spurious-Free Dynamic Range vs Clock Duty Cycle
Figure 35.
Frequency Spectrum (4096 Point FFT, f
IN
= 5 kHz, 0.56 V
PP
)
Figure 37.
Analog Supply Current vs Temperature
Figure 39.
Digital Supply Current vs Digital Supply Voltage (3 V)
Figure 41.
Digital Supply Current vs Temperature