JAJSPB8A June 2009 – January 2023 AMC6821-Q1
PRODUCTION DATA
The TACH-MODE bit of Configuration Register 2 specifies the TACH pulse output mode of the fan. Some fans (such as three- and two-wire) are powered directly by the PWM, and must be PWM-On to provide a TACH pulse output. When the PWM-Out pin switches these fans ON/OFF directly, the PWM-Out must be kept ON to power the fan during the measurement. In this case, the TACH-MODE bit of Configuration Register 2 must be cleared ('0'). When TACH-MODE = 0, the PWM-Out pin is kept ON during the critical tach edges of the measurement period. Clearing the TACH mode ('0') also enables the internal correction circuitry to correct the error caused by the extra duty cycle applied in the measurement period. The power-on default value of the PWM mode is '0'.
Some fans (such as the JMC® four-wire fan) are powered directly by dc power, instead of being powered by the PWM. In this case, the TACH mode must be set to '1'. When TACH-MODE = 1, the PWM-Out pin is not forced ON; instead, the status is controlled completely by the DCY register, just as in normal operation. Setting TACH-MODE to '1' also disables the internal correction circuit because no extra duty cycle is applied. Setting the TACH mode to '1' allows TACH reading continuously, regardless of the status of the PWM-Out pin.
The selection of the TACH mode affects the RPM monitoring and control. When the TACH-MODE bit is equal to '1', the duty cycle of the PWM-Out pin is always determined by the calculated value; the TACH data are always updated at every RPM monitoring. However, when the TACH-MODE bit is equal to '0', in the Software-RPM Control mode the PWM-Out pin is forced to 30% if the calculated duty cycle is less than 30%; in other modes, the PWM-Out pin is forced to 0% and the TACH data are not updated if the calculated duty cycle is less than 7%.