JAJSPB8A June   2009  – January 2023 AMC6821-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1 ADC Converter
      2. 8.2.2 Temperature Sensor
        1. 8.2.2.1 Series Resistance Cancellation
        2. 8.2.2.2 Reading Temperature Data
        3. 8.2.2.3 Temperature Out-of-Range Detection
        4. 8.2.2.4 Remote Temperature Sensor Failure Detection
      3. 8.2.3 PWM Output
      4. 8.2.4 PWM Waveform Setting
      5. 8.2.5 Fan Speed Measurement
        1. 8.2.5.1 Tach-Data Register
          1. 8.2.5.1.1 Reading the Tach Data Register
          2. 8.2.5.1.2 RPM Measurement Rate
          3. 8.2.5.1.3 Select Number of Pulses/Revolution
          4. 8.2.5.1.4 Tach Mode Selection
          5. 8.2.5.1.5 Fan RPM Out-of-Range Detection
      6. 8.2.6 Fan Failure Detection
      7. 8.2.7 FAN-FAULT Pin
      8. 8.2.8 Fan Control
        1. 8.2.8.1 THERM Pin and External Hardware Control
          1. 8.2.8.1.1 THERM Pin as an Output
          2. 8.2.8.1.2 THERM Pin as an Input
        2. 8.2.8.2 Fan Spin-Up
        3. 8.2.8.3 Normal Fan Speed Control
          1. 8.2.8.3.1 Software DCY Control Mode
          2. 8.2.8.3.2 Software-RPM Control Mode (Fan Speed Regulator)
          3. 8.2.8.3.3 Auto Temperature Fan Mode
      9. 8.2.9 Interrupt
        1. 8.2.9.1 OVR Pin
        2. 8.2.9.2 SMBALERT Pin
        3. 8.2.9.3 SMBALERT Interrupt Behavior
        4. 8.2.9.4 Handling SMBALERT Interrupts
    3. 8.3 Device Functional Modes
    4. 8.4 Programming
      1. 8.4.1 SMBus Interface
        1. 8.4.1.1 Communication Protocols
      2. 8.4.2 SMBus Alert Response Address (ARA)
      3. 8.4.3 Power-On Reset and Start Operation
    5. 8.5 Register Map
      1. 8.5.1 Register Description
        1. 8.5.1.1 Device Configuration Registers
        2. 8.5.1.2 Device Status Registers
        3. 8.5.1.3 Fan Controller Registers
        4. 8.5.1.4 Temperature Data Registers
        5. 8.5.1.5 Temperature Limit Registers
          1. 8.5.1.5.1 Tach-Data Register
          2. 8.5.1.5.2 Tach Setting Register
          3. 8.5.1.5.3 Tach Low Limit Register
          4. 8.5.1.5.4 Tach High Limit Register
  9. 9 Application and Implementation
    1. 9.1 Power Supply Recommendations
  10. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3 PWM Output

The PWM-Out pin is an open-drain output. When PWM-EN of Configuration Register 2 is cleared ('0'), the PWM-Out pin is disabled and goes into a high-impedance status. When PWM-EN is set ('1'), the PWM-Out pin is enabled to drive the fan. When enabled, the status of the PWM-Out pin is determined by the PWM duty cycle and phase bits (PWMINV of Configuration Register 1). When PWMINV = 0 (default), the PWM-Out pin goes low for 100% duty cycle (suitable for driving the fan using a PMOS FET). Setting PWMINV to '1' makes the PWM-Out pin go high (with an external pull-up resistor) for a 100% duty cycle. This setting is used to drive an NMOS-power FET.

GUID-8152FD70-6A75-4F99-8347-72E918BDA6AC-low.gifFigure 8-5 PWM Output