JAJSL87H january   2010  – april 2021 BQ24090 , BQ24091 , BQ24092 , BQ24093 , BQ24095

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 概要 (続き)
  7. 6 Device Options
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings #GUID-9FC6FB05-10A6-4323-9A52-EE32AE4C5F67/SLUS9405873
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions #GUID-4D70561B-CB71-403D-B731-8EF5DEBEBDF9/SLUS9401392
    4. 8.4 Thermal Information
    5. 8.5 Dissipation Ratings #GUID-196940BE-C3C2-4CDF-A8A4-7C186292F803/SLUS9404025 #GUID-196940BE-C3C2-4CDF-A8A4-7C186292F803/SLUS9403553
    6. 8.6 Electrical Characteristics
    7. 8.7 Typical Characteristics
      1. 8.7.1 Power Up, Power Down, OVP, Disable and Enable Waveforms
      2. 8.7.2 Protection Circuits Waveforms
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Power Down or Undervoltage Lockout (UVLO)
      2. 9.3.2  UVLO
      3. 9.3.3  Power Up
      4. 9.3.4  Sleep Mode
      5. 9.3.5  New Charge Cycle
      6. 9.3.6  Overvoltage Protection (OVP) – Continuously Monitored
      7. 9.3.7  Power Good Indication ( PG)
      8. 9.3.8  CHG Pin Indication
      9. 9.3.9  CHG and PG LED Pullup Source
      10. 9.3.10 IN-DPM (VIN-DPM or IN–DPM)
      11. 9.3.11 OUT
      12. 9.3.12 ISET
      13. 9.3.13 PRE_TERM – Precharge and Termination Programmable Threshold
      14. 9.3.14 ISET2
      15. 9.3.15 TS
    4. 9.4 Device Functional Modes
      1. 9.4.1 Termination and Timer Disable Mode (TTDM) - TS Pin High
      2. 9.4.2 Timers
      3. 9.4.3 Termination
      4. 9.4.4 Battery Detect Routine
      5. 9.4.5 Refresh Threshold
      6. 9.4.6 Starting a Charge on a Full Battery
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Calculations
          1. 10.2.2.1.1 Program the Fast Charge Current, ISET:
          2. 10.2.2.1.2 Program the Termination Current Threshold, ITERM:
          3. 10.2.2.1.3 TS Function
          4. 10.2.2.1.4 CHG and PG
        2. 10.2.2.2 Selecting IN and OUT Pin Capacitors
      3. 10.2.3 Application Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
      1. 12.3.1 Leakage Current Effects on Battery Capacity
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 サード・パーティ製品に関する免責事項
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  15.   Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.7 Power Good Indication ( PG)

After application of a 5-V source, the input voltage rises above the UVLO and sleep thresholds (VIN > VBAT + VDT), but is less than OVP (VIN < VOVP,), then the PG FET turns on and provides a low impedance path to ground. See Figure 8-1, Figure 8-2, and Figure 8-10.