SLUSEC9B October 2020 – July 2024 BQ25618E , BQ25619E
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VBUS / VBAT POWER UP | |||||
tVBUS_OV | VBUS OVP Reaction-time | 130 | ns | ||
tPOORSRC | Bad adapter detection duration | 30 | ms | ||
tPOORSRC_RETRY | Bad adapter detection retry wait time | 2 | s | ||
BATTERY CHARGER | |||||
tTERM_DGL | Deglitch time for charge termination | 30 | ms | ||
tRECHG_DGL | Deglitch time for recharge threshold | 30 | ms | ||
tTOP_OFF | Typical top-off timer accuracy TOP_OFF_TIMER[1:0]=10 | 30 | min | ||
tSAFETY | Charge safety timer accuracy, CHG_TIMER = 20hr | 17 | 20 | 24 | hr |
tSAFETY | Charge safety timer accuracy, CHG_TIMER = 10hr | 8 | 10 | 12 | hr |
QON Timing | |||||
tSHIPMODE | QON low time to turn on BATFET and exit shipmode (–10℃ ≤ TJ ≤ 60℃) | 0.9 | 1.3 | s | |
tQON_RST | QON low time before BATFET full system reset (–10℃ ≤ TJ ≤ 60℃) | 8 | 12 | s | |
tBATFET_RST | BATFET off time during full system reset (–10℃ ≤ TJ ≤ 60℃) | 250 | 400 | ms | |
tBATFET_DLY | Delay time before BATFET turn off in ship mode (–10℃ ≤ TJ ≤ 60℃) | 10 | 15 | s | |
I2C INTERFACE | |||||
fSCL | SCL clock frequency | 400 | kHz | ||
DIGITAL CLOCK AND WATCHDOG | |||||
fLPDIG | Digital low-power clock (REGN LDO is disabled) | 30 | kHz | ||
fDIG | Digital power clock | 500 | kHz | ||
tWDT | Watchdog Reset time (WATCHDOG REG05[5:4] = 160s) | 160 | s |