JAJSKU7C September 2022 – February 2024 BQ25620 , BQ25622
PRODUCTION DATA
After the REGN LDO is powered, the adapter has been qualified as a good source, and AUTO_INDET_EN bit = 1 (POR default), BQ25620 runs input source detection through D+/D– lines to detect USB Battery Charging Specification 1.2 (BC1.2) input sources (CDP / SDP / DCP) and non-standard adapters. If DCP is detected, BQ25620 runs HVDCP detection if either EN_9V or EN_12V is 1. The detection algorithm runs automatically each time that VBUS is plugged in, updating the IINDPM according to Table 8-2. If AUTO_INDET_EN = 0, the detection algorithm is not run and IINDPM remains unchanged. The host can force the detection algorithm to run and update IINDPM by setting FORCE_INDET to 1.
The USB BC1.2 is able to identify Standard Downstream Port (SDP), Charging Downstream Port (CDP), and Dedicated Charging Port (DCP). When the Data Contact Detection (DCD) timer of 500ms is expired, the non-standard adapter detection is applied to set the input current limit.
The secondary detection is used to distinguish two types of charging ports (CDP and DCP). Most of the time, a CDP requires the portable device (such as smart phone, tablet) to send back an enumeration within 2.5 seconds of CDP plug-in. Otherwise, the port reverts back to SDP even though the D+/D– detection indicates CDP.
Upon the completion of input source type detection, the following registers are changed:
After detection completes, the host can over-write the IINDPM register to change the input current limit if needed.
If DCP is detected (VBUS_STAT = 011), BQ25620 turns on VD+D-_0p6V_SRC on D+ if EN_DCP_BIAS is set to 1. Setting EN_DCP_BIAS to 0 while VBUS_STAT = 011 disables the VD+D-_0p6V_SRC on D+ pin, and setting EN_DCP_BIAS to 1 while VBUS_STAT = 011 enables the VD+D-_0p6V_SRC on D+ pin. The EN_HIZ bit has priority over EN_DCP_BIAS.
High Voltage Dedicated Charging Port (HVDCP) is used to negotiate either 9V or 12V from the power source if BC1.2 DCP support is detected.
In order to remain in 9V or 12V HVDCP, BQ25620 must maintain a bias on D+ and D-, resulting in higher quiescent current. The host may remove this bias and associated quiescent current by setting EN_9V and EN_12V to 0 at any time. Setting EN_9V and EN_12V to 0 when an HVDCP adapter is providing either 9V or 12V causes the adapter to revert to 5V DCP operation.
The non-standard detection is used to distinguish vendor specific adapters based on their unique dividers on the D+/D- pins. Comparators detect the voltage applied on each pin and determine the input current limit according to Table 8-1.
NON-STANDARD ADAPTER | D+ THRESHOLD | D– THRESHOLD | INPUT CURRENT LIMIT (A) |
---|---|---|---|
Divider 1 | VD+ within VD+D-_2p0 | VD– within VD+D-_2p8 | 1 |
Divider 2 | VD+ within VD+D-_2p8 | VD– within VD+D-_2p0 | 2.1 |
Divider 3 | VD+ within VD+D-_2p8 | VD– within VD+D-_2p8 | 2.4 |
D+/D– DETECTION | INPUT CURRENT LIMIT (IINLIM) | VBUS_STAT |
---|---|---|
USB SDP (USB500) | 500 mA | 0x1 |
USB CDP | 1.5 A | 0x2 |
USB DCP | 1.5 A | 0x3 |
Divider 1 | 1 A | 0x5 |
Divider 2 | 2.1 A | 0x5 |
Divider 3 | 2.4 A | 0x5 |
HVDCP | 1.5 A | 0x6 |
Unknown 5-V Adapter | 500mA | 0x4 |