JAJSKU9B December 2022 – February 2024 BQ25628 , BQ25629
PRODUCTION DATA
The host may place the BQ25628 into high impedance mode by writing EN_HIZ = 1. In high impedance mode, RBFET (Q1), HSFET (Q2) and LSFET (Q3) are turned off. The RBFET and HSFET block current flow to and from VBUS, putting the VBUS pin into a high impedance state. The BATFET (Q4) is turned on to connect the BAT to SYS. During high impedance mode, REGN is disabled and the digital clock is slowed to conserve power.
BQ25628 drives PMID_GD low in high-impedance mode.