JAJSSD2A October 2023 – December 2023 BQ25638
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
When battery charging is enabled (EN_CHG bit = 1 and CE pin is LOW), the device autonomously completes a charging cycle without host involvement. The device default charging parameters are listed in Table 7-1. The host can always control the charging operation and optimize the charging parameters by writing to the corresponding registers through I2C.
VREG | VRECHG | ITRICKLE | IPRECHG | ICHG | ITERM | TOPOFF TIMER | |
---|---|---|---|---|---|---|---|
BQ25638 | 4.2 V | VREG - 100mV | 80 mA | 200 mA | 2,000 mA | 200 mA | Disabled |
A new charge cycle starts when the following conditions are valid:
The charger automatically terminates the charging cycle when the charging current is below termination threshold, battery voltage is above recharge threshold, and device not is in DPM or thermal regulation. When a fully charged battery is discharged below VRECHG, the device automatically starts a new charging cycle. After charging terminates, toggling CE pin or EN_CHG bit will also initiate a new charging cycle.
The STAT output indicates the charging status. Refer to Section 7.3.8.2 for details of STAT pin operation. In addition, the status register (CHG_STAT) indicates the different charging phases as :
When the CHG_STAT transitions to any of these states, including when the charge cycle completes, an INT pulse is asserted to notify the host.