JAJSS91 November 2023 BQ25756E
PRODUCTION DATA
In order to improve converter light-load efficiency, the device switches to Pulse Frequency Modulation (PFM) control at light load when the EN_PFM bit is set to 1. The effective switching frequency will decrease accordingly when output load decreases.
EN_PFM bit is automatically cleared to 0 every time the converter starts and a valid SYNC clock input is detected on the FSW_SYNC pin, thereby ensuring fixed frequency operation regardless of output current. The bit can be overwritten to 1 to allow PFM after startup even when SYNC signal is present.
Light-load PFM mode can be disabled by clearing the EN_PFM bit. In this case, the device switches in PWM mode at a fixed switching frequency. It is recommended to disable PFM mode (EN_PFM = 0) when termination is enabled and set lower than 2 A.