JAJSQP6B December   2022  – March 2024 BQ25758

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power-On-Reset
      2. 6.3.2 Device Power-Up From Battery Without Input Source
      3. 6.3.3 Device Power Up from Input Source
        1. 6.3.3.1 VAC Operating Window Programming (ACUV and ACOV)
        2. 6.3.3.2 MODE Pin Configuration
        3. 6.3.3.3 REGN Regulator (REGN LDO)
        4. 6.3.3.4 Compensation-Free Buck-Boost Converter Operation
          1. 6.3.3.4.1 Light-Load Operation
        5. 6.3.3.5 Switching Frequency and Synchronization (FSW_SYNC)
        6. 6.3.3.6 Device HIZ Mode
      4. 6.3.4 Power Management
        1. 6.3.4.1 Output Voltage Programming (VOUT_REG)
        2. 6.3.4.2 Output Current Programming (IOUT pin and IOUT_REG)
        3. 6.3.4.3 Dynamic Power Management: Input Voltage and Input Current Regulation
          1. 6.3.4.3.1 Input Current Regulation
            1. 6.3.4.3.1.1 IIN Pin
          2. 6.3.4.3.2 Input Voltage Regulation
        4. 6.3.4.4 Bypass Mode
      5. 6.3.5 Bidirectional Power Flow and Programmability
      6. 6.3.6 Integrated 16-Bit ADC for Monitoring
      7. 6.3.7 Status Outputs (PG, STAT and INT)
        1. 6.3.7.1 Power Good Indicator (PG)
        2. 6.3.7.2 Interrupt to Host (INT)
      8. 6.3.8 Protections
        1. 6.3.8.1 Voltage and Current Monitoring
          1. 6.3.8.1.1 VAC Over-voltage Protection (VAC_OVP)
          2. 6.3.8.1.2 VAC Under-voltage Protection (VAC_UVP)
          3. 6.3.8.1.3 Reverse Mode Over-voltage Protection (REV_OVP)
          4. 6.3.8.1.4 Reverse Mode Under-voltage Protection (REV_UVP)
          5. 6.3.8.1.5 DRV_SUP Under-voltage and Over-voltage Protection (DRV_OKZ)
          6. 6.3.8.1.6 REGN Under-voltage Protection (REGN_OKZ)
        2. 6.3.8.2 Thermal Shutdown (TSHUT)
      9. 6.3.9 Serial Interface
        1. 6.3.9.1 Data Validity
        2. 6.3.9.2 START and STOP Conditions
        3. 6.3.9.3 Byte Format
        4. 6.3.9.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 6.3.9.5 Target Address and Data Direction Bit
        6. 6.3.9.6 Single Write and Read
        7. 6.3.9.7 Multi-Write and Multi-Read
    4. 6.4 Device Functional Modes
      1. 6.4.1 Host Mode and Default Mode
      2. 6.4.2 Register Bit Reset
    5. 6.5 BQ25758 Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Application (Buck-Boost configuration)
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 ACUV / ACOV Input Voltage Operating Window Programming
          2. 7.2.1.2.2 Switching Frequency Selection
          3. 7.2.1.2.3 Inductor Selection
          4. 7.2.1.2.4 Input (VAC) Capacitor
          5. 7.2.1.2.5 Output (VBAT) Capacitor
          6. 7.2.1.2.6 Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
          7. 7.2.1.2.7 Converter Fast Transient Response
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Typical Application (Buck-only configuration)
        1. 7.2.2.1 Design Requirements
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報
7.2.1.2.7 Converter Fast Transient Response

The device integrates all the loop compensation, thereby providing a high density solution with ease of use. For faster transient reponse, the EN_CONV_FAST_TRANSIENT bit can be set to 1. If device is not used in boost mode operation, this section can be disregarded.

When the converter is operating in boost mode, the non-continuous inductor current flow to the load results in a right-half plane (RHP) zero. The RHP zero location is:

Equation 15. R H P z = V I N , b o o s t I I N , b o o s t 1 2 π L

For good phase margin, the unity gain bandwidth (UGBW) of the converter should be about 1/3 of the RHPz. The boost output capacitor (Cload), and the converter transient parameters (R1, gm1) need to be scaled to move the location of the UGBW of the converter.

Equation 16. 1 ≈ A d i v × g m 1 ( s R 1 C 1 + 1 ) s C 1 V i I o × 50 m 1 1 + s C l o a d R l o a d 2

The device adjusts Adiv, gm1 and R1 based on the output voltage and the EN_CONV_FAST_TRANSIENT bit setting per the table below. During some boost case scenarios, the Cload needs to be adjusted to limit the converter bandwidth.

Table 7-5 Converter Fast Transient Response
BOOST OUTPUT VOLTAGE Adiv C1 EN_CONV_FAST_TRANSIENT = 0 EN_CONV_FAST_TRANSIENT = 1
gm1 R1 gm1 R1
≤8 V 1/5 75 pF 0.4 μ 600 kΩ 2 μ 1.3 MΩ
8 V to 16 V 1/10 75 pF 0.47 μ 1 MΩ 2 μ 1.8 MΩ
16 V to 32 V 1/20 75 pF 0.67 μ 2.8 MΩ 2 μ 2.8 MΩ
>32 V 1/40 75 pF 2 μ 2.8 MΩ 2 μ 2.8 MΩ

As an example, assume the device operates in boost mode from a 5V supply to provide a 7V boost output voltage with load up-to 5A and 10μH inductor. The RHPz is approximately located at:

Equation 17. R H P z = V I N , b o o s t I I N , b o o s t 1 2 π L = 11.4 k H z

For best stability, the UGBW of the converter should be limited to 1/3 of the RHP zero, or 3.8kHz. If EN_CONV_FAST_TRANSIENT = 1, the equation becomes:

Equation 18. 1 ≈ 0.2 × 2 μ   ( j ω × 1.3 M Ω × 75 p F + 1 ) j ω × 75 p F 5 V 5 A × 50 m 1 1 + j ω C l o a d × 1.4 2

Solving the above for Cload gives ≥674 μF capacitor requirement.

Conversely, if EN_CONV_FAST_TRANSIENT = 0, the UGBW equation becomes:

Equation 19. 1 ≈ 0.2 × 0.4 μ   ( j ω × 0.6 M Ω × 75 p F + 1 ) j ω × 75 p F 5 V 5 A × 50 m 1 1 + j ω C l o a d × 1.4 2

Solving the above for Cload gives ≥51 μF capacitor requirement. However, the minimum recommended capacitor for converter stability is 80 μF, so this minimum value should be used.