JAJSVE9 July 2024 BQ25820
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
QUIESCENT CURRENTS | ||||||
ISD_BAT | Shutdown battery current with BATFET off (ISRN + ISRP) | VBAT = 28V, VAC = 0V, ADC_EN = 0, FORCE_BATFET_OFF = 1, TJ < 105 °C | 10 | µA | ||
IQ_BAT | Quiescent battery current with BATFET on (ISRN + ISRP) | VBAT = 28V, VAC = 0V, ADC_EN = 0, TJ < 105 °C | 17 | µA | ||
VBAT = 28V, VAC = 0V, ADC_EN = 1, TJ < 105 °C | 500 | 700 | µA | |||
IHIZ_VAC | HIZ input current (IVAC) | EN_HIZ = 1 | 10 | 30 | µA | |
IQ_VAC | Quiescent input current (IVAC) | Not switching | 0.75 | 1 | mA | |
IQ_REV | Quiescent battery current in Reverse mode (ISRN + ISRP) | Not switching | 0.75 | 1 | mA | |
VAC / BAT POWER UP | ||||||
VVAC_OP | VAC operating range | 4.4 | 70 | V | ||
VVAC_OK | VAC converter enable threshold | VAC rising, no battery | 4.4 | V | ||
VVAC_OKZ | VAC converter disable threshold | VAC falling, no battery | 3.5 | V | ||
VREF_ACUV | ACUV comparator threshold to enter VAC_UVP | VACUV falling | 1.095 | 1.1 | 1.106 | V |
VREF_ACUV_HYS | ACUV comparator threshold hysteresis | VACUV rising | 50 | mV | ||
VVAC_INT_OV | VAC internal threshold to enter VAC_OVP | IN rising | 72 | 74 | 76 | V |
VVAC_INT_OVZ | VAC internal thresholds to exit VAC_OVP | IN falling | 69 | 71 | 73 | V |
VREF_ACOV | ACOV comparator threshold to enter VAC_OVP | VACOV rising | 1.184 | 1.2 | 1.206 | V |
VREF_ACOV_HYS | ACOV comparator threshold hysteresis | VACOV falling | 50 | mV | ||
VSRN_OK | Battery voltage to enable BATFET | VSRN rising, no input | 3.1 | V | ||
VSRN_OKZ | Battery voltage to disable BATFET | - VSRN falling, no input | 2.15 | 2.65 | V | |
CHARGE VOLTAGE REGULATION | ||||||
VVFB_RANGE | Feedback voltage range | 1.504 | 1.566 | V | ||
VVFB_NOM | Nominal feedback voltage | VFB_REG = 0x10 | 1.536 | V | ||
VVFB_ACC | Feedback voltage regulation accuracy | TJ = 0°C to 85°C | –0.5 | 0.5 | % | |
TJ = -40°C to 125°C | –0.7 | 0.7 | % | |||
RFBG | FBG resistance to PGND | IFBG = 1mA | 33 | 55 | Ω | |
FAST CHARGECURRENT REGULATION | ||||||
ICHG_REG_RANGE | Charge current regulation range | 0.4 | 20 | A | ||
ICHG_REG_ACC | I2C setting charge current regulation accuracy | RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ICHG_REG = 0x012C | 15 | A | ||
–3 | 3 | % | ||||
RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ICHG_REG = 0x0064 | 5 | A | ||||
–3 | 3 | % | ||||
RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ICHG_REG = 0x0028 | 2 | A | ||||
–5 | 5 | % | ||||
KICHG | Hardware charge current limit set factor (Amperes of charge current per kΩ on ICHG pin) | RBAT_SNS = 5mΩ, RICHG = 10kΩ, 5kΩ, and 3.33kΩ | 48 | 50 | 52 | A x kΩ |
VREF_ICHG | ICHG pin voltage when ICHG pin is in regulation | 2.0 | V | |||
PRE-CHARGE CURRENT REGULATION | ||||||
IPRECHG_RANGE | Precharge current regulation range | VFB < VBAT_LOWV * VVFB_REG | 0.25 | 10 | A | |
IPRECHG_ACC | I2C setting precharge current accuracy | RBAT_SNS = 5mΩ, VFB < VBAT_LOWV * VVFB_REG. IPRECHG = 0x003C | 3.0 | A | ||
–4 | 4 | % | ||||
RBAT_SNS = 5mΩ, VFB < VBAT_LOWV * VVFB_REG. IPRECHG[1:0] = 0x0014 | 1.0 | A | ||||
–10 | 10 | % | ||||
RBAT_SNS = 5mΩ, VFB < VBAT_LOWV * VVFB_REG. IPRECHG[1:0] = 0x000A | 0.50 | A | ||||
–30 | 30 | % | ||||
CHARGE TERMINATION | ||||||
ITERM_RANGE | Termination current range | VFB = VVFB_REG | 0.25 | 10 | A | |
ITERM_ACC | Termination current accuracy | RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ITERM = 0x001E | 1.5 | A | ||
–7 | 7 | % | ||||
RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ITERM = 0x000A | 0.50 | A | ||||
–20 | 20 | % | ||||
RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ITERM = 0x0005 | 0.250 | A | ||||
–50 | 50 | % | ||||
BATTERY VOLTAGE COMPARATORS | ||||||
VBAT_SHORT | Trickle charge to pre-charge transition | VSRN rising | 2.8 | 3 | 3.2 | V |
Pre-charge to trickle charge transition | VSRN falling | 2.2 | 2.4 | 2.6 | V | |
VBAT_LOWV | Pre-charge to fast-charge transition | VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 3 | 69.0 | 71.7 | 73.8 | % |
VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 2 | 64.3 | 66.7 | 69.0 | % | ||
VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 1 | 52 | 55 | 58 | % | ||
VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 0 | 27 | 30 | 33 | % | ||
VBAT_LOWV_HYS | BAT_LOWV hysteresis | 5 | % | |||
VRECHG | Battery recharge threshold for Li-Ion and LiFePO4 | VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 3 | 97.6 | % | ||
VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 2 | 95.2 | % | ||||
VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 1 | 94.3 | % | ||||
VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 0 | 93.0 | % | ||||
INPUT CURRENT REGULATION | ||||||
IIREG_DPM_ACC | I2C setting input current regulation accuracy in forward mode | RAC_SNS = 2mΩ, IAC_DPM = 0x00A0 | 20 | A | ||
–3 | 3 | % | ||||
RAC_SNS = 2mΩ, IAC_DPM = 0x0050 | 10 | A | ||||
–4 | 4 | % | ||||
RAC_SNS = 2mΩ, IAC_DPM = 0x0028 | 5.0 | A | ||||
–7 | 7 | % | ||||
KILIM | Hardware input current limit set factor (Amperes of input current per kΩ on ILIM_HIZ pin) | RAC_SNS = 2mΩ, RILIM = 5kΩ, 2.5kΩ, and 1.67kΩ | 48 | 50 | 52 | A x kΩ |
VREF_ILIM_HIZ | ILIM_HIZ pin voltage when ILIM_HIZ pin is in regulation | 2.0 | V | |||
VIH_ILIM_HIZ | ILIM_HIZ input high threshold to enter HIZ mode | VILIM_HIZ rising | 3.7 | V | ||
INPUT VOLTAGE REGULATION | ||||||
VVREG_DPM_RANGE | Input voltage DPM regulation range | 4.4 | 65 | V | ||
VVREG_DPM_ACC | I2C setting input voltage regulation accuracy | VAC_DPM = 0x076C | 38 | V | ||
–2 | 2 | % | ||||
VVREG_DPM_ACC | I2C setting input voltage regulation accuracy in forward mode | VAC_DPM = 0x04E2 | 25 | V | ||
–2 | 2 | % | ||||
VAC_DPM = 0x03B6 | 19 | V | ||||
–2 | 2 | % | ||||
VACUV_DPM | ACUV pin voltage when in VDPM regulation | 1.198 | 1.210 | 1.222 | V | |
REVERSE MODE VOLTAGE REGULATION | ||||||
VREV_RANGE | SYS Voltage regulation range in Reverse mode | 3.3 | 65 | V | ||
VREV_ACC | Voltage regulation accuracy in Reverse mode | VSYS_REV = 0x0960 | 48 | V | ||
–2 | 2 | % | ||||
VSYS_REV = 0x0578 | 28 | V | ||||
–2 | 2 | % | ||||
VREV_ACC | VAC Voltage regulation accuracy in Reverse mode | VSYS_REV = 0x02EE | 15 | V | ||
–2 | 2 | % | ||||
VSYS_REV = 0x00FA | 5 | V | ||||
–2 | 2 | % | ||||
REVERSE MODE CURRENT REGULATION | ||||||
IIREV_ACC | Input current regulation accuracy in Reverse mode | RAC_SNS = 2mΩ, IAC_REV = 0x00A0 | 20 | A | ||
–3.5 | 3.5 | % | ||||
RAC_SNS = 2mΩ, IAC_REV = 0x0028 | 5.0 | A | ||||
–5.5 | 5.5 | % | ||||
CHARGE MODE BATTERY-PACK NTC MONITOR | ||||||
VT1_RISE | TS pin voltage rising T1 threshold, charge suspended above this voltage. | As Percentage to REGN, TS_T1=0°C w/ 103AT | 72.75 | 73.25 | 73.85 | % |
VT1_FALL | TS pin voltage falling T1 threshold, charge re-enabled below this voltage. | As Percentage to REGN, TS_T1=0°C w/ 103AT | 71.5 | 72 | 72.5 | % |
VT2_RISE | TS pin voltage rising T2 threshold, charge back to reduced ICHG above this voltage | As Percentage to REGN, TS_T2=10°C w/ 103AT | 67.75 | 68.25 | 68.75 | % |
VT2_FALL | TS pin voltage falling T2 threshold. Charge back to normal below this voltage | As Percentage to REGN, TS_T2=10°C w/ 103AT | 66.45 | 66.95 | 67.45 | % |
VT3_FALL | TS pin voltage falling T3 threshold, charge to ICHG and reduced VFB_REG below this voltage. | As Percentage to REGN, TS_T3=45°C w/ 103AT | 44.25 | 44.75 | 45.25 | % |
VT3_RISE | TS pin voltage rising T3 threshold. Charge back to normal above this voltage. | As Percentage to REGN, TS_T3=45°C w/ 103AT | 45.55 | 46.05 | 46.55 | % |
VT5_FALL | TS pin voltage falling T5 threshold, charge suspended below this voltage | As Percentage to REGN, TS_T5=60°C w/ 103AT | 33.875 | 34.375 | 34.875 | % |
VT5_RISE | TS pin voltage rising T5 threshold. Charge back to ICHG and reduced VFB_REG above this voltage. | As Percentage to REGN, TS_T5=60°C w/ 103AT | 35 | 35.5 | 36 | % |
REVERSE MODE BATTERY-PACK NTC MONITOR | ||||||
VBCOLD_RISE | TS pin voltage rising TCOLD threshold. Reverse mode suspended above this voltage | As Percentage to REGN (BCOLD = –20°C w/ 103AT) | 79.45 | 80.0 | 80.55 | % |
VBCOLD_RISE | TS pin voltage rising TCOLD threshold. Reverse mode suspended above this voltage | As Percentage to REGN (BCOLD = –10°C w/ 103AT) | 76.65 | 77.15 | 77.65 | % |
VBCOLD_FALL | TCOLD comparator falling threshold. | As Percentage to REGN (–20°C w/ 103AT) | 78.2 | 78.7 | 79.2 | % |
VBCOLD_FALL | TCOLD comparator falling threshold. | As Percentage to REGN (–10°C w/ 103AT) | 75.5 | 75.6 | 76.5 | % |
VBHOT_FALL | TS pin voltage falling THOT threshold. Reverse mode suspends below this voltage | As Percentage to REGN, (BHOT = 55°C w/ 103AT) | 37.2 | 37.7 | 38.2 | % |
VBHOT_FALL | TS pin voltage falling THOT threshold. Reverse mode suspends below this voltage | As Percentage to REGN, (BHOT = 60°C w/ 103AT) | 33.875 | 34.375 | 34.875 | % |
VBHOT_FALL | TS pin voltage falling THOT threshold. Reverse mode suspends below this voltage | As Percentage to REGN, (BHOT 65°C w/ 103AT) | 30.75 | 31.25 | 31.75 | % |
VBHOT_RISE | TS pin voltage rising THOT threshold. Reverse mode allowed above this voltage | As Percentage to REGN, (BHOT = 55°C w/ 103AT) | 38.5 | 39.0 | 39.95 | % |
VBHOT_RISE | TS pin voltage rising THOT threshold. Reverse mode allowed above this voltage | As Percentage to REGN, (BHOT = 60°C w/ 103AT) | 35 | 35.5 | 36 | % |
VBHOT_RISE | TS pin voltage rising THOT threshold. Reverse mode allowed above this voltage | As Percentage to REGN, (BHOT 65°C w/ 103AT) | 32.0 | 32.5 | 33.0 | % |
BATTERY CHARGER PROTECTION | ||||||
VBAT_OV | Battery overvoltage threshold | VFB rising, as percentage of VFB_REG | 102.5 | 104 | 105.5 | % |
VBAT_OVZ | Battery overvoltage falling threshold | VFB falling, as percentage of VFB_REG | 100.5 | 102 | 103.5 | % |
VICHG_OC | Battery charge over-current threshold | VSRP - VSRN rising | 120 | 170 | mV | |
THERMAL SHUTDOWN | ||||||
TSHUT | Thermal shutdown rising threshold | Temperature increasing | 150 | °C | ||
Thermal shutdown falling threshold | Temperature decreasing | 135 | °C | |||
REGN REGULATOR AND GATE DRIVE SUPPLY (DRV_SUP) | ||||||
VREGN | REGN LDO output voltage | IREGN = 20mA | 4.8 | 5 | 5.2 | V |
VAC = 5V, IREGN = 20mA | 4.35 | 4.6 | V | |||
IREGN | REGN LDO current limit | VREGN = 4.5V | 70 | mA | ||
VREGN_OK | REGN OK threshold to allow switching | REGN rising | 3.55 | V | ||
VDRV_UVPZ | DRV_SUP under-voltage threshold to allow switching | DRV_SUP rising | 3.7 | V | ||
VDRV_OVP | DRV_SUP over-voltage threshold to disable switching | DRV_SUP rising | 12.8 | 13.2 | 13.6 | V |
POWER-PATH MANAGER | ||||||
VACDRV_REG | ACFET drive voltage | VACDRV - VVAC, IACDRV = 10µA | 10 | V | ||
IACDRV_ON | ACFET charge pump current limit | VACDRV - VVAC = 5V | 40 | µA | ||
IACDRV_OFF | ACFET turnoff current | 3 | mA | |||
VBATDRV_REG | BATFET drive voltage | VBATDRV - VBATSRC, VAC = 0V, IBATDRV = 10µA | 10 | V | ||
IBATDRV_REG | BATFET charge pump current limit | VBATDRV - VBATSRC = 5V, VAC = 0V | 40 | µA | ||
IBATDRV_OFF | BATFET turnoff current | 400 | µA | |||
IAC_LOAD | VAC discharge load current | 16 | mA | |||
IBAT_LOAD | Battery (SRN) discharge load current | 16 | mA | |||
SWITCHING FREQUENCY AND SYNC | ||||||
fSW | Switching Frequency | RFSW_SYNC = 133kΩ | 212 | 250 | 288 | kHz |
RFSW_SYNC = 50kΩ | 425 | 500 | 575 | kHz | ||
VIH_SYNC | FSW_SYNC input high threshold | 1.3 | V | |||
VIL_SYNC | FSW_SYNC input low threshold | 0.4 | V | |||
PWSYNC | FSW_SYNC input pulse width | 80 | ns | |||
PWM DRIVERS | ||||||
RHIDRV1_ON | Buck side high-side turnon resistance | VBTST1 - VSW1 = 5V | 3.4 | Ω | ||
RHIDRV1_OFF | Buck side high-side turnoff resistance | VBTST1 - VSW1 = 5V | 1.0 | Ω | ||
VBTST1_REFRESH | Bootstrap refresh comparator threshold voltage | BTST1 falling, VBTST1 - VSW1 when low-side refresh pulse is requested | 2.7 | 3.1 | 3.9 | V |
RLODRV1_ON | Buck side low-side turnon resistance | VREGN = 5V | 3.4 | Ω | ||
RLODRV1_OFF | Buck side low-side turnoff resistance | VREGN = 5V | 1.0 | Ω | ||
tDT1 | Buck side dead time, both edges | 45 | ns | |||
ANALOG-TO-DIGITAL CONVERTER (ADC) | ||||||
tADC_CONV | Conversion-time, each measurement | ADC_SAMPLE[1:0] = 00 | 24 | ms | ||
ADC_SAMPLE[1:0] = 01 | 12 | ms | ||||
ADC_SAMPLE[1:0] = 10 | 6 | ms | ||||
ADCRES | Effective resolution | ADC_SAMPLE[1:0] = 00 | 14 | 15 | bits | |
ADC_SAMPLE[1:0] = 01 | 13 | 14 | bits | |||
ADC_SAMPLE[1:0] = 10 | 12 | 13 | bits | |||
ADC MEASUREMENT RANGE AND LSB | ||||||
IAC_ADC | Input current ADC reading (positive or negative) | Range with 2mΩ RAC_SNS | –50000 | 50000 | mA | |
LSB with 2mΩ RAC_SNS | 2 | mA | ||||
IBAT_ADC | Battery current ADC reading (positive or negative) | Range with 5mΩ RBAT_SNS | –20000 | 20000 | mA | |
LSB with 5mΩ RBAT_SNS | 2 | mA | ||||
VAC_ADC | Input voltage ADC reading | Range | 0 | 65534 | mV | |
LSB | 2 | mV | ||||
VBAT_ADC | Battery voltage ADC reading | Range | 0 | 65534 | mV | |
LSB | 2 | mV | ||||
VSYS_ADC | System voltage ADC reading | Range | 0 | 65534 | mV | |
LSB | 2 | mV | ||||
TSADC | TS voltage ADC reading, as percentage of REGN | Range | 0 | 99.9 | % | |
LSB | 0.098 | % | ||||
VFB_ADC | FB voltage ADC reading | Range | 0 | 2047 | mV | |
LSB | 1 | mV | ||||
I2C INTERFACE (SCL, SDA) | ||||||
VIH | Input high threshold level | 1.3 | V | |||
VIL | Input low threshold level | 0.4 | V | |||
VOL | Output low threshold level | Sink current = 5mA | 0.4 | V | ||
IIN_BIAS | High-level leakage current | Pull up rail 3.3V | 1 | µA | ||
LOGIC I/O PIN (CE, PG, STAT1, STAT2) | ||||||
VIH | Input high threshold level (CE) | 1.3 | V | |||
VOL | Output low threshold level (CE, PG, STAT1, STAT2) | Sink current = 5mA | 0.4 | V | ||
VIL | Input low threshold level (CE) | 0.4 | V | |||
IOUT_BIAS | High-level leakage current (CE, PG, STAT1, STAT2) | Pull up rail 3.3V | 1 | µA |