JAJSEG2K October   2017  – July 2024 BQ2980 , BQ2982

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Device Configurability
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage (OV) Status
      2. 7.3.2 Undervoltage (UV) Status
      3. 7.3.3 Overcurrent in Charge (OCC) Status
      4. 7.3.4 Overcurrent in Discharge (OCD) and Short Circuit in Discharge (SCD) Status
      5. 7.3.5 Overtemperature (OT) Status
      6. 7.3.6 Charge and Discharge Driver
      7. 7.3.7 CTR for FET Override and Device Shutdown
      8. 7.3.8 CTR for PTC Connection
      9. 7.3.9 ZVCHG (0-V Charging)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Modes
        1. 7.4.1.1 Power-On-Reset (POR)
        2. 7.4.1.2 NORMAL Mode
        3. 7.4.1.3 FAULT Mode
        4. 7.4.1.4 SHUTDOWN Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Test Circuits for Device Evaluation
      2. 8.1.2 Test Circuit Diagrams
      3. 8.1.3 Using CTR as FET Driver On/Off Control
    2. 8.2 Typical Applications
      1. 8.2.1 BQ298x Configuration 1: System-Controlled Reset/Shutdown Function
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Selection of Power FET
        4. 8.2.1.4 Application Curves
      2. 8.2.2 BQ298x Configuration 2: CTR Function Disabled
      3. 8.2.3 BQ298x Configuration 3: PTC Thermistor Protection
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 サード・パーティ製品に関する免責事項
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.4 Overcurrent in Discharge (OCD) and Short Circuit in Discharge (SCD) Status

The BQ298xyz device detects a current fault by monitoring the voltage drop across an external sense resistor (RSNS) between the CS and VSS pins. The device applies the same method to detect OCD and SCD faults and applies the same recovery scheme to release the OCD and SCD faults.

The device detects an OCD fault when (VCS – VSS) > OCD threshold (+VOC). If this condition exists for longer than the OCD delay (tOC), the DSG output is driven to VFETOFF to turn off the DSG FET. The SCD detection is similar to OCD, but uses the SCD threshold (VSCD) and SCD delay (tSCD) time.

During an OCD or SCD state, the device turns on the recovery detection circuit. An internal current sink (IPACK – VDD) is connected between the PACK and VDD pins, and the device consumes IOC_REC during the OCD and SCD fault until recovery is detected.

The OCD or SCD status is released and the DSG output rises to HIGH, that is VDSG = VDD × (1 + AFETON), if (VBAT – VPACK) < 400 mV, indicating a discharge load is removed.