JAJSLR4E december   2012  – april 2021 BQ7716

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Sense Positive Input for Vx
      2. 8.3.2 Output Drive, OUT
      3. 8.3.3 Supply Input, VDD
      4. 8.3.4 External Delay Capacitor, CD
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 OVERVOLTAGE Mode
      3. 8.4.3 Customer Test Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Export Control Notice
    6. 12.6 用語集
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-D99A2EFA-1911-41AC-BDA6-3C0760D6E232-low.gif Figure 6-1 DPJ Package8-Pin WSONTop View
Table 6-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO. I/O(1)
CD 7 I/O External capacitor connection for delay timer
OUT 8 OA Output drive for overvoltage fault signal
VDD 1 P Power supply
VSS 6 P Electrically connected to IC ground and negative terminal of the lowest cell in the stack
V1 5 I Sense input for positive voltage of the lowest cell in the stack
V2 4 I Sense input for positive voltage of the second cell from the bottom of the stack
V3 3 I Sense input for positive voltage of the third cell from the bottom of the stack
V4 2 I Sense input for positive voltage of the fourth cell from the bottom of the stack
(1) IA = Input Analog, OA = Output Analog, P = Power Connection