JAJSKT4J
July 2021 – November 2023
BQ77216
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
概要 (続き)
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
DC Characteristics
7.6
Timing Requirements
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Voltage Fault Detection
8.3.2
Open-Wire Fault Detection
8.3.3
Temperature Fault Detection
8.3.4
Oscillator Health Check
8.3.5
Sense Positive Input for Vx
8.3.6
Output Drive, COUT and DOUT
8.3.7
The LATCH Function
8.3.8
Supply Input, VDD
8.4
Device Functional Modes
8.4.1
NORMAL Mode
8.4.2
FAULT Mode
8.4.3
Customer Test Mode
9
Application and Implementation
9.1
Application Information
9.1.1
Design Requirements
9.1.2
Detailed Design Procedure
9.1.2.1
Cell Connection Sequence
9.2
Systems Example
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
サード・パーティ製品に関する免責事項
12.2
ドキュメントの更新通知を受け取る方法
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Revision History
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|24
MPDS363A
サーマルパッド・メカニカル・データ
発注情報
jajskt4j_oa
jajskt4j_pm
11.1
Layout Guidelines
Ensure the RC filters for the Vn and VDD pins are placed as close as possible to the target terminal.
The VSS pin should be routed to the CELL– terminal.