JAJSKT4J July   2021  – November 2023 BQ77216

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Characteristics
    6. 7.6 Timing Requirements
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Voltage Fault Detection
      2. 8.3.2 Open-Wire Fault Detection
      3. 8.3.3 Temperature Fault Detection
      4. 8.3.4 Oscillator Health Check
      5. 8.3.5 Sense Positive Input for Vx
      6. 8.3.6 Output Drive, COUT and DOUT
      7. 8.3.7 The LATCH Function
      8. 8.3.8 Supply Input, VDD
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 FAULT Mode
      3. 8.4.3 Customer Test Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Design Requirements
      2. 9.1.2 Detailed Design Procedure
        1. 9.1.2.1 Cell Connection Sequence
    2. 9.2 Systems Example
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 サード・パーティ製品に関する免責事項
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD Supply voltage (1) 5 75 V
VIN Input voltage range of Vn - Vn-1 where n = 2 to 16 and V1 - VSS 0 5 V
TS 0 1.5 V
VCTM Customer Test Mode Entry VDD > V16 + VCTM 12 13 V
CTS Total capacitance on the TS Pin 200 pF
TA Ambient temperature –40 85 °C
TJ Junction temperature –65 150 °C
(1) VDD is equal to top of stack voltage