JAJSKT4J July   2021  – November 2023 BQ77216

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Characteristics
    6. 7.6 Timing Requirements
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Voltage Fault Detection
      2. 8.3.2 Open-Wire Fault Detection
      3. 8.3.3 Temperature Fault Detection
      4. 8.3.4 Oscillator Health Check
      5. 8.3.5 Sense Positive Input for Vx
      6. 8.3.6 Output Drive, COUT and DOUT
      7. 8.3.7 The LATCH Function
      8. 8.3.8 Supply Input, VDD
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 FAULT Mode
      3. 8.4.3 Customer Test Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Design Requirements
      2. 9.1.2 Detailed Design Procedure
        1. 9.1.2.1 Cell Connection Sequence
    2. 9.2 Systems Example
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 サード・パーティ製品に関する免責事項
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 DC Characteristics

Typical values stated where TA = 25°C and VDD = 58 V, MIN/MAX values stated where TA = –40°C to 85°C and VDD = 5 V to 75 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OVER VOLTAGE PROTECTION (OV)
VOV OV Detection Range 3.55 5.1 V
VOV_STEP OV Detection Steps 25 mV
VOV_HYS OV Detection Hysteresis Selected OV Hysteresis depends on the part number. See the device selection table for details. VOV – 100 mV
Selected OV Hysteresis depends on the part number. See the device selection table for details.  VOV – 200 mV
VOV_ACC OV Detection Accuracy TA = 25℃
 		 –10 10 mV
OV Detection Accuracy 0℃ ≤ TA ≤ 60℃
 		 –20 20 mV
OV Detection Accuracy –40℃ ≤ TA ≤ 110℃
 		 –50 50 mV
UNDER VOLTAGE PROTECTION (UV)
VUV UV Detection Range 1.0 3.5 V
VUV_STEP UV Detection Steps 50 mV
VUV_HYS UV Detection Hysteresis Selected OV Hysteresis depends on the part number. See the device selection table for details.  VUV + 100 mV
Selected OV Hysteresis depends on the part number. See the device selection table for details.  VUV + 200 mV
VUV_ACC UV Detection Accuracy TA = 25℃ –30 30 mV
UV Detection Accuracy –40 ≤ TA ≤ 110℃ –50 50 mV
VUV_MIN UV Detection Disabled Threshold Vn – Vn-1 where n = 2 to 16 and V1 – VSS 450 500 550 mV
OVER TEMPERATURE PROTECTION (OT)
TOT OT Detection Range Available options: 62°C, 65°C, 70°C, 75°C, 80°C, 83°C 62.0 83.0 °C
ROT_EXT OT Detection External Resistance 62°C 2850 Ω
65°C 2570
70°C 2195
75°C 1915
80°C 1651
83°C 1525
TOT_ACC (1) OT Detection Accuracy –5 5 °C
TOT_HYS (2) OT Detection Hysteresis –10 °C
4186 Ω
3530 Ω
RNTC Internal Pullup Resistor After TI Factory Trim 19.5 20 20.6 kΩ
OPEN WIRE PROTECTION (OW)
VOW OW Detection Threshold Vn < Vn-1 where n = 2 to 16 –200 mV
V1 – VSS 500 mV
VOW_HYS OW Detection Hysteresis Vn < Vn-1 where n = 1 to 16 VOW +100 mV
VOW_ACC OW Detection Accuracy –40 ℃ ≤ TA ≤ 110℃ –25 25 mV
SUPPLY AND LEAKAGE CURRENT
ICC Supply Current No fault detected 2 3.5 µA
IIN (2) Input Current at Vx Pins Vn – Vn-1 and V1 – VSS = 4 V, where n = 2 to 16, Open Wire Enabled  –0.3 0.3 µA
Vn – Vn-1 and V1 – VSS = 4 V, where n = 2 to 16, Open Wire Disabled  –0.1 0.1 µA
OUTPUT DRIVE, COUT and DOUT, CMOS ACTIVE HIGH VERSIONS ONLY
VOUT_AH Output Drive Voltage for COUT and DOUT, Active High 6V Vn – Vn-1 or V1 – VSS > VOV, where n = 2 to 16, VDD = 58 V, IOH = 100 µA measured out of COUT, DOUT pin 6 V
Output Drive Voltage for COUT and DOUT, Active High VDD VDD – VCOUT or VDOUT, Vn – Vn-1 or V1 – VSS > VOV, where n = 2 to 16, IOH = 10 µA measured out of COUT, DOUT pin 0 1 1.5 V
Output Drive Voltage for COUT and DOUT, Active High 6V VDD – VCOUT or VDOUT, if 15 of 16 cells are short-circuited and only one cell remains powered and > VOV, VDD = Vx (cell voltage), IOH = 100 µA, 0 1 1.5 V
Output Drive Voltage for COUT and DOUT, Active High 6V and VDD Vn – Vn-1 and V1 – VSS < VOV, where n = 2 to 16, VDD = 58 V, IOH = 100 µA measured into pin 250 400 mV
ROUT_AH Internal Pullup Resistor 80 100 120 kΩ
IOUT_AH_H OUT Source Current (during OV) Vn – Vn-1 or V1 – VSS > VOV, where n = 2 to 16, VDD = 58 V, OUT = 0 V. Measured out of COUT, DOUT pin 4.5 mA
IOUT_AH_L OUT Sink Current (no OV) Vn – Vn-1 and V1 – VSS < VOV, where n = 2 to 16, VDD = 58 V, OUT = VDD. Measured into COUT, DOUT pin 0.3 3 mA
OUTPUT DRIVE, COUT and DOUT, NCH OPEN DRAIN ACTIVE LOW VERSIONS ONLY
VOUT_AL Output Drive Voltage for COUT and DOUT, Active Low Vn – Vn-1 or V1 – VSS > VOV, where n = 2 to 16, VDD = 58 V, IOH = 100 µA measured into COUT, DOUT pin 250 400 mV
IOUT_AL_L OUT Source Current (during OV) Vn – Vn-1 or V1 – VSS > VOV, where n = 2 to 16, VDD = 58 V, OUT = VDD. Measured into COUT, DOUT pin 0.3 3 mA
IOUT_AL_H OUT Sink Current (no OV) Vn – Vn-1 and V1 – VSS < VOV, where n = 2 to 16, VDD = 58 V, OUT = VDD. Measured out of COUT, DOUT pin 100 nA
(1) Assured by Design. This accuracy assumes the external resistance is within ±2% of the R_OT_EXT values for the corresponding temperature threshold.
(2) Assured by Design