JAJSSK0 December   2023 CC2340R5-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 機能ブロック図
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram – RHB Package (Top View)
    2. 6.2 Signal Descriptions – RHB Package
    3. 6.3 Connections for Unused Pins and Modules – RHB Package
    4. 6.4 RHB Peripheral Pin Mapping
    5. 6.5 RHB Peripheral Signal Descriptions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  DCDC
    5. 7.5  Global LDO (GLDO)
    6. 7.6  Power Supply and Modules
    7. 7.7  Battery Monitor
    8. 7.8  Temperature Sensor
    9. 7.9  Power Consumption - Power Modes
    10. 7.10 Power Consumption - Radio Modes
    11. 7.11 Nonvolatile (Flash) Memory Characteristics
    12. 7.12 Thermal Resistance Characteristics
    13. 7.13 Thermal Shutdown
    14. 7.14 RF Frequency Bands
    15. 7.15 Bluetooth Low Energy - Receive (RX)
    16. 7.16 Bluetooth Low Energy - Transmit (TX)
    17. 7.17 2.4 GHz RX/TX CW
    18. 7.18 Timing and Switching Characteristics
      1. 7.18.1 Reset Timing
      2. 7.18.2 Wakeup Timing
      3. 7.18.3 Clock Specifications
        1. 7.18.3.1 48 MHz Crystal Oscillator (HFXT)
        2. 7.18.3.2 48 MHz RC Oscillator (HFOSC)
        3. 7.18.3.3 32 kHz Crystal Oscillator (LFXT)
        4. 7.18.3.4 32 kHz RC Oscillator (LFOSC)
    19. 7.19 Peripheral Characteristics
      1. 7.19.1 UART
        1. 7.19.1.1 UART Characteristics
      2. 7.19.2 SPI
        1. 7.19.2.1 SPI Characteristics
        2. 7.19.2.2 SPI Controller Mode
        3. 7.19.2.3 SPI Timing Diagrams - Controller Mode
        4. 7.19.2.4 SPI Peripheral Mode
        5. 7.19.2.5 SPI Timing Diagrams - Peripheral Mode
      3. 7.19.3 I2C
        1. 7.19.3.1 I2C
        2. 7.19.3.2 I2C Timing Diagram
      4. 7.19.4 GPIO
        1. 7.19.4.1 GPIO DC Characteristics
      5. 7.19.5 ADC
        1. 7.19.5.1 Analog-to-Digital Converter (ADC) Characteristics
      6. 7.19.6 Comparators
        1. 7.19.6.1 Ultra-low power comparator
    20. 7.20 Typical Characteristics
      1. 7.20.1 MCU Current
      2. 7.20.2 RX Current
      3. 7.20.3 TX Current
      4. 7.20.4 RX Performance
      5. 7.20.5 TX Performance
      6. 7.20.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth 5.3 Low Energy
    4. 8.4  Memory
    5. 8.5  Cryptography
    6. 8.6  Timers
    7. 8.7  Serial Peripherals and I/O
    8. 8.8  Battery and Temperature Monitor
    9. 8.9  µDMA
    10. 8.10 Debug
    11. 8.11 Power Management
    12. 8.12 Clock Systems
    13. 8.13 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.12 Clock Systems

The CC2340R5-Q1 device has the following internal system clocks.

The 48 MHz HFCLK is used as the main system (MCU and peripherals) clock. This is driven by the internal 48 MHz RC Oscillator (HFOSC), which can track its accuracy against an external 48 MHz crystal (HFXT). Radio operation requires an external 48 MHz crystal.

The 32.768 kHz LFCLK is used as the internal low-frequency system clock. It is used for the RTC, the watchdog timer (if enabled in standby power mode), and to synchronize the radio timer before or after Standby power mode. LFCLK can be driven by the internal 32.8 kHz RC Oscillator (LFOSC), a 32.768 kHz watch-type crystal, or clock input in LFXT bypass mode. When using a crystal or the internal RC oscillator, the device can output the 32 kHz LFCLK signal to other devices, thereby reducing the overall system cost.