JAJSRA0D March   2023  – December 2023 CC3300 , CC3301

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 システム図
  6. 5 Terminal Configuration and Functions
    1. 5.1 Pin Diagram
    2. 5.2 Pin Attributes
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Electrical Characteristics
    5. 6.5  Thermal Resistance Characteristics
    6. 6.6  WLAN Performance: 2.4-GHz Receiver Characteristics
    7. 6.7  WLAN Performance: 2.4-GHz Transmitter Power
    8. 6.8  BLE Performance: Receiver Characteristics
    9. 6.9  BLE Performance - Transmitter Characteristics
    10. 6.10 Current Consumption - WLAN Static Modes
    11. 6.11 Current Consumption - WLAN Use Cases
    12. 6.12 Current Consumption - BLE Static Modes
    13. 6.13 Current Consumption - Device States
    14. 6.14 Timing and Switching Characteristics
      1. 6.14.1 Power Supply Sequencing
      2. 6.14.2 Clocking Specifications
        1. 6.14.2.1 Slow Clock Generated Internally
        2. 6.14.2.2 Slow Clock Using an External Oscillator
          1. 6.14.2.2.1 External Slow Clock Requirements
        3. 6.14.2.3 Fast Clock Using an External Crystal (XTAL)
          1. 6.14.2.3.1 External Fast Clock XTAL Specifications
    15. 6.15 Interface Timing Characteristics
      1. 6.15.1 SDIO Timing Specifications
        1. 6.15.1.1 SDIO Timing Diagram - Default Speed
        2. 6.15.1.2 SDIO Timing Parameters - Default Speed
        3. 6.15.1.3 SDIO Timing Diagram - High Speed
        4. 6.15.1.4 SDIO Timing Parameters - High Speed
      2. 6.15.2 SPI Timing Specifications
        1. 6.15.2.1 SPI Timing Diagram
        2. 6.15.2.2 SPI Timing Parameters
      3. 6.15.3 UART 4-Wire Interface
        1. 6.15.3.1 UART Timing Parameters
  8. 7 Applications, Implementation, and Layout
  9. 8 Device and Documentation Support
    1. 8.1 サード・パーティ製品に関する免責事項
    2. 8.2 製品の命名規則
    3. 8.3 Tools and Software
    4. 8.4 Documentation Support
    5. 8.5 サポート・リソース
    6. 8.6 Trademarks
    7. 8.7 静電気放電に関する注意事項
    8. 8.8 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.15.2.2 SPI Timing Parameters

PARAMETER DESCRIPTION MIN MAX UNIT
fclock Clock frequency, CLK 26 MHz
tHigh High Period 10 ns
tLow Low Period 10
tTLH Rise time, CLK 3
tTHL Fall time, CLK 3
tCSsu CS Setup time, CS valid before CLK ↑  3
tISU PICO, input valid before CLK ↑ 3
tIH PICO Hold time, input valid after CLK ↑ 3
tDr, tDf - Active Delay time, CLK ↑/↓ to output valid 2 10
tDr, tDf - Sleep Delay time, CLK ↑/↓ to output valid 12
CL Capacitive load on outputs 15 40 pF