SCHS023E November 1998 – September 2016 CD4013B
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | Q1 | O | Channel 1 output |
2 | Q1 | O | Inverted channel 1 output |
3 | CLOCK1 | I | Channel 1 clock input |
4 | RESET1 | I | Channel 1 reset |
5 | D1 | I | Channel 1 data input |
6 | SET1 | I | Channel 1 set |
7 | VSS | — | Ground |
8 | SET2 | I | Channel 2 set |
9 | D2 | I | Channel 2 data input |
10 | RESET2 | I | Channel 2 reset |
11 | CLOCK2 | I | Channel 2 clock input |
12 | Q2 | O | Inverted channel 2 output |
13 | Q2 | O | Channel 2 output |
14 | VDD | — | Power supply |