JAJSM64D November   1998  – July 2021 CD4027B

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Static Electrical Characteristics
    4. 6.4 Dynamic Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes (1)
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • NS|16
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

6.2 Recommended Operating Conditions

at TA = 25℃, except as noted. For maximum reliability, nominal operating conditions should be selected so that operation is always within the following ranges:
CHARACTERISTIC VDD

(V)

 LIMITS UNIT
ALL PACKAGES
MIN MAX
Supply-Voltage Range For TA = Full Package

Temperature Range

 3 18 V
tS Data Setup Time 5 200 ns
10 75
15 50
tW Clock Pulse Width 5 140 ns
10 60
15 40
fCL Clock Input Frequency (Toggle Mode) 5 3.5 MHz
10 dc 8
15 12
trCL, tfCL(1) Clock Rise or Fall Time 5 45 μs
10 5
15 2
tW Set or Reset Pulse Width 5 180 ns
10 80
15 50
(1) If more than one unite is cascaded in a parallel clocked operation, trCL should be made less than or equal to the sum of the fixed propagation delay time at 15 pF and the transitiopn time of the output driving stage for the estimated capacitive load.