JAJSJB0K August   1998  – June 2020 CD4049UB , CD4050B

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 説明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: DC
    6. 6.6 Electrical Characteristics: AC
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Test Circuits
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • PW|16
  • NS|16
  • N|16
  • DW|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

Test Circuits

GUID-EE95F53D-132C-49A4-9ED4-AF58792A6170-low.gifFigure 7-1 Quiescent Device Current Test Circuit
GUID-7451AF1F-CD40-4EB1-B8DD-A1A4C5B8ECFF-low.gif
Measure inputs sequentially, to both VCC and VSS connect all unused inputs to either VCC or VSS.
Figure 7-3 Input Current Test Circuit
GUID-64316A93-9900-4DF0-8DCC-669321FB3CBE-low.gif
CL includes fixture capacitance.
Figure 7-5 Dynamic Power Dissipation Test Circuits
GUID-970B089C-27DC-4BD9-915D-C3CA84D110E7-low.gif
Test any one input with other inputs at VCC or VSS.
Figure 7-2 Input Voltage Test Circuit
GUID-EAC7EA6B-332C-405C-94A6-CD6A8C9087D5-low.gif
IN Pin: A, B, C, D, E, or F
OUT Pin: G, H, I, J, K, or L
VCC Pin
VSS Pin
Figure 7-4 Logic Level Conversion Application