JAJSUM2B December   1998  – May 2024 CD54AC541 , CD54ACT540 , CD54ACT541 , CD74AC540 , CD74AC541 , CD74ACT540 , CD74ACT541

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 概要
  4. 3  Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics, AC Series
    6. 4.6 Electrical Characteristics, ACT Series
    7. 4.7 Switching Characteristics, AC Series
    8. 4.8 Switching Characteristics, ACT Series
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • J|20
サーマルパッド・メカニカル・データ

4.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage −0.5 6 V
IIK Input diode current (VI < −0.5 or VI > VCC + 0.5 V) ±20 mA
IOK Output diode current (VO < −0.5 or VO > VCC + 0.5 V) ±50 mA
IO Output source or sink current per output PIN (VO > −0.5 or VO < VCC + 0.5 V) ±50 mA
Vcc or ground current, ICC or IGND(1) ±100 mA
Tstg Storage temperature −65 +150 °C
(1) For up to 4 outputs per device: add ±25 mA for each additional output.