JAJSMC1 June 2020 CD54HCT4075 , CD74HCT4075
PRODUCTION DATA
TTL-Compatible CMOS inputs are high impedance and are typically modeled as a resistor from the input to ground in parallel with the input capacitance given in the GUID-B29E2681-995A-4E15-87AB-85861611A493.html#GUID-B29E2681-995A-4E15-87AB-85861611A493. The worst case resistance is calculated with the maximum input voltage, given in the GUID-AF22504E-2650-4176-8D36-600F09176DA4.html#GUID-AF22504E-2650-4176-8D36-600F09176DA4, and the maximum input leakage current, given in the GUID-B29E2681-995A-4E15-87AB-85861611A493.html#GUID-B29E2681-995A-4E15-87AB-85861611A493, using ohm's law (R = V ÷ I).
Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in the GUID-098A3ED2-05F3-431E-AE8D-F8F58B480F3D.html#GUID-098A3ED2-05F3-431E-AE8D-F8F58B480F3D to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a device with a Schmitt-trigger input should be used to condition the input signal prior to the TTL-compatible CMOS input.
TTL-Compatible CMOS inputs have a lower threshold voltage than standard CMOS inputs to allow for compatibility with older bipolar logic devices. See the GUID-098A3ED2-05F3-431E-AE8D-F8F58B480F3D.html#GUID-098A3ED2-05F3-431E-AE8D-F8F58B480F3D for the valid input voltages for the CD74HCT4075.