JAJSUM2B December   1998  – May 2024 CD54AC541 , CD54ACT540 , CD54ACT541 , CD74AC540 , CD74AC541 , CD74ACT540 , CD74ACT541

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 概要
  4. 3  Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics, AC Series
    6. 4.6 Electrical Characteristics, ACT Series
    7. 4.7 Switching Characteristics, AC Series
    8. 4.8 Switching Characteristics, ACT Series
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DB|20
  • N|20
  • DW|20
サーマルパッド・メカニカル・データ

7.1 Power Supply Recommendations

The power supply can be any voltage between the min and max supply voltage rating located in Section 4.3.

Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, TI recommends 0.1 µF and if there are multiple VCC terminals, then TI recommends .01 µF or .022 µF for each power terminal. It is okay to parallel multiple bypass capacitors to reject different frequencies of noise. A 0.1 µF and 1 µF are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results.