JAJSNS7E January   1998  – October 2022 CD54HC540 , CD54HC541 , CD54HCT541 , CD74HC540 , CD74HC541 , CD74HCT540 , CD74HCT541

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|20
  • DW|20
サーマルパッド・メカニカル・データ
発注情報

5.4 Electrical Characteristics

PARAMETER TEST CONDITIONS(2) VCC(V) 25℃ –40℃ to 85℃ –55℃ to 125℃ UNIT
MIN TYP MAX MIN MAX MIN MAX
HC TYPES
VIH High level input voltage 2 1.5 1.5 1.5 V
4.5 3.15 3.15 3.15
6 4.2 4.2 4.2
VIL Low level input voltage 2 0.5 0.5 0.5 V
4.5 1.35 1.35 1.35
6 1.8 1.8 1.8
VOH

High level output voltage

CMOS loads

 IOH = – 20 μA 2 1.9 1.9 1.9 V
IOH = – 20 μA 4.5 4.4 4.4 4.4
IOH = – 20 μA 6 5.9 5.9 5.9

High level output voltage

TTL loads

 IOH = – 6 mA 4.5 3.98 3.84 3.7
IOH = – 7.8 mA 6 5.48 5.34 5.2
VOL

Low level output voltage

CMOS loads

 IOL = 20 μA 2 0.1 0.1 0.1 V
IOL = 20 μA 4.5 0.1 0.1 0.1
IOL = 20 μA 6 0.1 0.1 0.1

Low level output voltage

TTL loads

 IOL = 6 mA 4.5 0.26 0.33 0.4
IOL = 7.8 mA 6 0.26 0.33 0.4
II Input leakage current VI = VCC or GND 6 ±0.1 ±1 ±1 μA
ICC Quiescent device current VI = VCC or GND 6 8 80 160 μA
IOZ Three-state leakage current VO = VCC or GND 6 ±0.5 ±5.0 ±10 μA
HCT TYPES
VIH High level input voltage 4.5 to 5.5 2 2 2 V
VIL Low level input voltage 4.5 to 5.5 0.8 0.8 0.8 V
VOH

High level output voltage

CMOS loads

 VOH = – 20 μA 4.5 4.4 4.4 4.4 V

High level output voltage

TTL loads

 VOH = – 6 mA 4.5 3.98 3.84 3.7
VOL

Low level output voltage

CMOS loads

 VOL = 20 μA 4.5 0.1 0.1 0.1 V

Low level output voltage

TTL loads

 VOL = 6 mA 4.5 0.26 0.33 0.4
II Input leakage current VI = VCC and GND 5.5 ±0.1 ±1 ±1 μA
ICC Quiescent device current VI = VCC and GND 5.5 8 80 160 μA
IOZ Three-state leakage current VO = VCC or GND 5.5 ±0.5 ±5.0 ±10 μA
ΔICC(1) HCT540
Additional quiescent device current per input pin		 A0 - A7 inputs held at VCC–2.1 4.5 to 5.5 100 360 450 490 μA
OE2 input held at VCC–2.1 4.5 to 5.5 100 270 337.5 367.5 μA
OE1 input held at VCC–2.1 4.5 to 5.5 100 414 517.5 563.5 μA
HCT541
Additional quiescent device current per input pin		 A0 - A7 inputs held at VCC–2.1 4.5 to 5.5 100 144 180 196 μA
OE2 input held at VCC–2.1 4.5 to 5.5 100 270 337.5 367.5 μA
OE1 input held at VCC–2.1 4.5 to 5.5 100 414 517.5 563.5 μA
(1) For dual-supply systems theoretical worst case (VI = 2.4 V, VCC = 5.5 V) specification is 1.8mA.
(2) VI = VIH or VOL, unless otherwise noted.