JAJSNS7E January   1998  – October 2022 CD54HC540 , CD54HC541 , CD54HCT541 , CD74HC540 , CD74HC541 , CD74HCT540 , CD74HCT541

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|20
  • DW|20
サーマルパッド・メカニカル・データ
発注情報

5.3 Thermal Information

THERMAL METRIC DW (SOIC) N (PDIP) PW (TSSOP) UNIT
20 PINS 20 PINS 20 PINS
RθJA Junction-to-ambient thermal resistance(1) 109.1 84.6 131.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 76 72.5 72.2 °C/W
RθJB Junction-to-board thermal resistance 77.6 65.3 82.8 °C/W
ψJT Junction-to-top characterization parameter 51.5 55.3 21.5 °C/W
ψJB Junction-to-board characterization parameter 77.1 65.2 82.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.