JAJSG05H November 2009 – October 2024 CDC3RL02
PRODUCTION DATA
The CDC3RL02 is designed for use in mobile applications as shown in Figure 8-2. In this example, a single low noise TCXO system clock source is buffered to drive a mobile GPS receiver and WLAN transceiver. Each peripheral independently requests an active clock by asserting a single clock request line (CLK_REQ_1 or CLK_REQ_2). When both clock request lines are inactive, the CDC3RL02 enters a low current shutdown mode. In this mode, the LDO output, CLK_OUT_1, and CLK_OUT_2 are pulled to GND and the TCXO is not powered.
When either peripheral requests the clock, the CDC3RL02 enables the LDO and powers the TCXO. The TCXO output (square wave, sine wave, or clipped sine wave) is converted to a square wave and buffered to the requested output.