JAJSNG3D June   2013  – February 2024 CDCE913-Q1 , CDCEL913-Q1

PRODUCTION DATA  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Device Comparison
6. 5 Pin Configuration and Functions
7. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics
   6. 6.6 Timing Requirements
   7. 6.7 Typical Characteristics
8. 7 Parameter Measurement Information
9. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 Control Terminal Configuration
      2. 8.3.2 Default Device Configuration
      3. 8.3.3 I2C Serial Interface
      4. 8.3.4 Data Protocol
   4. 8.4 Device Functional Modes
      1. 8.4.1 SDA and SCL Hardware Interface
   5. 8.5 Programming
10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
       1. 9.2.1 Design Requirements
       2. 9.2.2 Detailed Design Procedure
          1. 9.2.2.1 Spread-Spectrum Clock (SSC)
          2. 9.2.2.2 PLL Frequency Planning
          3. 9.2.2.3 Crystal Oscillator Start-Up
          4. 9.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
          5. 9.2.2.5 Unused Inputs and Outputs
          6. 9.2.2.6 Switching Between XO and VCXO Mode
       3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
       1. 9.4.1 Layout Guidelines
       2. 9.4.2 Layout Example
11. 10Register Maps
    1. 10.1 I2C Configuration Registers
12. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
       1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
13. 12Revision History
14. 13Mechanical, Packaging, and Orderable Information