JAJSH89D May 2012 – April 2019 CDCUN1208LP
PRODUCTION DATA.
The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range, two universal differential or single-ended inputs, and universal outputs (HCSL, LVDS, or LVCMOS) with edge rate control. The clock buffer supports PCIe Gen1, Gen2, and Gen3. One of the device inputs includes a divider that provides divide values of /1, /2, /4, or /8. The device is flexible and easy to use. The state of certain pins determines device configuration at power up. Alternately, the CDCUN1208LP provides a SPI/I2C port with which a host processor controls device settings. The CDCUN1208LP delivers excellent additive jitter performance, and low power consumption. The device can run in mixed output supply mode with a dedicated supply pin for each group of outputs. This allows the device to work as an LVCMOS-level translator as well.