JAJSH89D May 2012 – April 2019 CDCUN1208LP
PRODUCTION DATA.
Register 00: OUT1
Register 01: OUT2
Register 02: OUT3
Register 03: OUT4
Register 04: OUT5
Register 05: OUT6
Register 06: OUT7
Register 07: OUT8
REGISTER ADDRESS | RAM BIT | BIT NAME | RELATED BLOCK | DESCRIPTION / FUNCTION | POWER UP CONDITION |
---|---|---|---|---|---|
11 | 15 | TI RESERVED | |||
14 | TI RESERVED | ||||
13 | TI RESERVED | ||||
12 | TI RESERVED | ||||
11 | TI RESERVED | ||||
10 | TI RESERVED | ||||
9 | TI RESERVED | ||||
8 | TI RESERVED | 0 | |||
7 | TI RESERVED | 0 | |||
6 | TI RESERVED | 0 | |||
5 | IN_DIV[1] | Input
(IN2 – Divider) |
Input Divider Control
1 1 = /8 1 0 = /4 0 1 = /2 0 0 = /1 |
0 | |
4 | IN_DIV[0] | 0 | |||
3 | IN_TYPE[1] | Input(1)
(IN1 and IN2 Type) |
Input Type
1 1 = HCSL 1 0 = LVCMOS 0 1 = LVCMOS 0 0 = LVDS |
0 | |
2 | IN_TYPE[0] | 0 | |||
1 | INSEL[1] | Input
(multiplexer) |
Input Multiplexer Control
1 1 = Control through INSEL pin 1 0 = Smart MUX enabled, IN 1=primary 0 1 = IN2 buffer selected 0 0 = IN1 buffer selected |
0 | |
0 | INSEL[0] | 0 | |||
12-14 | ALL | TI RESERVED | |||
15 | 2-15 | TI RESERVED | |||
1 | RESET | Device Reset
1 = Reset device 0 = Run device |
0 | ||
0 | PD | Device Power Down
1 = Device is powered down 0 = Device is active |
0 |