JAJSI27A October 2019 – December 2019 DAC11001A , DAC81001 , DAC91001
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Read/Write | Address | 00h | |||||||||||||
R | W | W | |||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0h | ALM | 00h | 0h | ||||||||||||
W | R | W | W |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | Read/Write | R | N/A | Read when set to 1 , read only |
30:24 | Address | W | N/A | 05h |
23:13 | 000h | W | N/A | N/A |
12 | ALM | R | 0 | Alarm indicator bit, This bit is not masked by ENALMP bit
0 :Temperature recalibration in progress 1 : DAC codes recalibrated, ALARM pin is pulled low (if ENALMP = 1) Subsequent DAC codes will use latest calibrated coefficients. Reading back this register resets ALARM pin to 1 status. |
11:4 | 00h | W | N/A | N/A |
3:0 | 0h | W | N/A | N/A |