JAJSGJ3E
November 2018 – August 2023
DAC60501
,
DAC70501
,
DAC80501
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: SPI Mode
7.7
Timing Requirements: I2C Standard Mode
7.8
Timing Requirements: I2C Fast Mode
7.9
Timing Requirements: I2C Fast-Mode Plus
7.10
Timing Diagrams
7.11
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
DAC Architecture
8.3.1.1
DAC Transfer Function
8.3.1.2
DAC Register Structure
8.3.1.3
Output Amplifier
8.3.2
Internal Reference
8.3.2.1
Solder Heat Reflow
8.3.3
Power-On-Reset (POR)
8.3.4
Software Reset
8.4
Device Functional Modes
8.4.1
Power-Down Mode
8.5
Programming
8.5.1
Serial Interface
8.5.1.1
SPI Mode
8.5.1.1.1
SYNC Interrupt
8.5.1.2
I2C Mode
8.5.1.2.1
F/S Mode Protocol
8.5.1.2.2
I2C Update Sequence
8.5.1.2.2.1
Address Byte
8.5.1.2.2.2
Command Byte
8.5.1.2.2.3
Data Byte (MSDB and LSDB)
8.5.1.2.3
I2C Read Sequence
8.6
Register Map
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Charge Injection
9.2.2.2
Voltage Droop
9.2.2.3
Output Offset Error
9.2.2.4
Switch Selection
9.2.2.5
Amplifier Selection
9.2.2.6
Hold Capacitor Selection
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DQF|8
MPSS009B
DGS|10
MPDS035C
サーマルパッド・メカニカル・データ
発注情報
jajsgj3e_oa
jajsgj3e_pm
9.4.2
Layout Example
Figure 9-3
Layout Example