SLASF62 June   2024 DAC80516

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements - I2C Standard Mode
    7. 5.7  Timing Requirements - I2C Fast Mode
    8. 5.8  Timing Requirements - I2C Fast Mode Plus
    9. 5.9  Timing Requirements - SPI
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagrams
    12. 5.12 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Digital-to-Analog Converter (DAC) Architecture
        1. 6.3.1.1 DAC Register Structure
          1. 6.3.1.1.1 DAC Synchronous Operation
          2. 6.3.1.1.2 DAC Buffer Amplifier
          3. 6.3.1.1.3 DAC Transfer Function
      2. 6.3.2 Internal Reference
      3. 6.3.3 Power-On Reset (POR)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Clear Mode
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
        1. 6.5.1.1 I2C Bus Overview
        2. 6.5.1.2 I2C Bus Definitions
        3. 6.5.1.3 I2C Target Address Selection
        4. 6.5.1.4 I2C Read and Write Operations
        5. 6.5.1.5 I2C General-Call Reset
      2. 6.5.2 Serial Peripheral Interface (SPI)
        1. 6.5.2.1 SPI Bus Overview
  8. 7 Register Map
    1. 7.1 DAC80516 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bipolar Voltage Output
    2. 8.2 Typical Application
      1. 8.2.1 Programmable High-Current Voltage Output Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Initialization Setup
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RUY|28
サーマルパッド・メカニカル・データ
発注情報

8.1.1 Bipolar Voltage Output

While the DAC80516 is designed for single-supply operation, Figure 8-1 shows that a bipolar output is also possible.

DAC80516 Bipolar Operation Using the DAC80516 Figure 8-1 Bipolar Operation Using the DAC80516

The circuit in Figure 8-1 gives a bipolar output voltage at VOUTPUT which is calculated as follows (at gain = 1):

Equation 2. V O U T P U T C O D E =   V R E F × C O D E 2 16 1 + R 3 R 2 + R 3 R 1 - V R E F × R 3 R 1

where

  • VOUTPUT(CODE) = output voltage of circuit for a given code
  • CODE = 0 to 65535. This is the digital code loaded to the DAC
  • VREF = reference voltage applied to the DAC80516

The bipolar output span can be calculated through Equation 2 by defining a few parameters, the first being the value for the reference voltage. After a reference voltage is chosen, the gain resistors can be set accordingly by determining the desired VOUTPUT at code 0 and code 65536. For a VREF of 2.5V, gain of 1, and a desired output voltage range of ±10V, the calculation is as follows.

CODE = 0:

Equation 3. V O U T P U T 0 =   - V R E F × R 3 R 1 = - 2.5 V × R 3 R 1

Setting the equation to minimum output span, VOUTPUT(0) = –10V, reduces the equation to: R3 / R1 = 4.

CODE = 65536:

Setting the equation to maximum output scan, VOUTPUT(65536) = 10V, and R3 / R1 = 4 reduces the equation to: R3 / R2 = 3

The maximum code of a 16-bit DAC is 65535; code 65536 is used to simplify Equation 3. For practical use, the true output span uses a range of –10V to (10V – 1LSB); in this case, –10V to +9.9996V.