JAJSUV8A
June 2024 – November 2024
DAC80516
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements - I2C Standard Mode
5.7
Timing Requirements - I2C Fast Mode
5.8
Timing Requirements - I2C Fast Mode Plus
5.9
Timing Requirements - SPI
5.10
Switching Characteristics
5.11
Timing Diagrams
5.12
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Digital-to-Analog Converter (DAC) Architecture
6.3.1.1
DAC Register Structure
6.3.1.1.1
DAC Synchronous Operation
6.3.1.1.2
DAC Buffer Amplifier
6.3.1.1.3
DAC Transfer Function
6.3.2
Internal Reference
6.3.3
Power-On Reset (POR)
6.4
Device Functional Modes
6.4.1
Clear Mode
6.5
Programming
6.5.1
I2C Serial Interface
6.5.1.1
I2C Bus Overview
6.5.1.2
I2C Bus Definitions
6.5.1.3
I2C Target Address Selection
6.5.1.4
I2C Read and Write Operations
6.5.1.5
I2C General-Call Reset
6.5.2
Serial Peripheral Interface (SPI)
6.5.2.1
SPI Bus Overview
7
Register Map
7.1
DAC80516 Registers
8
Application and Implementation
8.1
Application Information
8.1.1
Bipolar Voltage Output
8.2
Typical Application
8.2.1
Programmable High-Current Voltage Output Circuit
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.3
Initialization Setup
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.2
Layout Examples
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
RUY|28
サーマルパッド・メカニカル・データ
発注情報
jajsuv8a_oa
jajsuv8a_pm
9.1
Documentation Support
Note:
TI is transitioning to use more inclusive terminology. Some language can be different than what is expected for certain technology areas.