at TJ = 25°C,
AVDD = 5.5V, VIO = 5.5V, internal reference = 2.5V, gain =
2, DAC outputs unloaded (unless otherwise noted)
Figure 5-3 Integral Nonlinearity vs Digital Input Code
Figure 5-5 Integral Nonlinearity vs Temperature
Figure 5-7 Offset Error vs Temperature
Figure 5-9 Integral Nonlinearity vs Supply Voltage
Figure 5-11 Offset Error vs Supply Voltage![DAC80516 Supply Current With External Reference vs Digital Input Code DAC80516 Supply Current With External Reference vs Digital Input Code](/ods/images/SLASF62/GUID-20240614-SS0I-7OM5-J3BP-SAK7P50WE9JL-low.svg)
Gain =
2, external reference = 2.5V |
|
Figure 5-13 Supply Current With External Reference vs Digital Input Code![DAC80516 Supply Current With External Reference vs Temperature DAC80516 Supply Current With External Reference vs Temperature](/ods/images/SLASF62/GUID-20240527-SS0I-12EG-LKTY-AV9OAFK9JBKT-low.svg)
Gain =
2, external reference = 2.5V |
|
Figure 5-15 Supply Current With External Reference vs Temperature![DAC80516 Supply Current With External Reference vs Supply Voltage DAC80516 Supply Current With External Reference vs Supply Voltage](/ods/images/SLASF62/GUID-20240531-SS0I-XCGV-FRWK-0958MRJ753RU-low.svg)
Gain =
1, external reference = 2.5V |
|
Figure 5-17 Supply Current With External Reference vs Supply Voltage
Figure 5-19 Headroom vs Load Current
Figure 5-21 Source and Sink Capability
Figure 5-23 Full-Scale Settling Time,
Rising Edge
Figure 5-25 Glitch Impulse, Falling Edge
Figure 5-27 Power-On, Reset to Zero Scale
Figure 5-29 Channel-to-Channel DC Crosstalk![DAC80516 DAC Output AC PSRR vs
Frequency DAC80516 DAC Output AC PSRR vs
Frequency](/ods/images/SLASF62/GUID-20240606-SS0I-QOY2-XTSZ-36AWC8V9LPVW-low.svg)
DAC code at full scale, VDD = 5V +
200mVPP |
|
Figure 5-31 DAC Output AC PSRR vs
Frequency![DAC80516 DAC
Output Noise With External Reference 0.1Hz to 10Hz DAC80516 DAC
Output Noise With External Reference 0.1Hz to 10Hz](/ods/images/SLASF62/GUID-20240527-SS0I-B0MK-4JPC-1LFRQ0LFIEZD-low.svg)
DAC
code at midscale, gain = 2, external reference =
2.5V |
Figure 5-33 DAC
Output Noise With External Reference 0.1Hz to 10Hz
Figure 5-35 Internal Reference Noise Density vs Frequency
Figure 5-4 Differential Nonlinearity vs Digital Input Code
Figure 5-6 Differential Nonlinearity vs Temperature
Figure 5-8 Zero-Scale Error vs Temperature
Figure 5-10 Differential Nonlinearity vs Supply Voltage
Figure 5-12 Zero-Scale Error vs Supply Voltage
Figure 5-14 Supply Current With Internal Reference vs Digital Input Code
Figure 5-16 Supply Current With Internal Reference vs Temperature
Figure 5-18 Supply Current With Internal Reference vs Supply Voltage
Figure 5-20 Headroom vs Load Current
Figure 5-22 Source and Sink Capability
Figure 5-24 Full-Scale Settling Time,
Falling Edge
Figure 5-26 Glitch Impulse, Rising Edge
Figure 5-28 Clear
to Zero Scale![DAC80516 Clock
Feedthrough DAC80516 Clock
Feedthrough](/ods/images/SLASF62/GUID-20240605-SS0I-6TCB-DBS0-5IBEEFEKQQ2Q-low.png)
DAC code at midscale, SCLK = 1MHz |
|
Figure 5-30 Clock
Feedthrough
Figure 5-32 DAC
Output Noise Density vs Frequency
Figure 5-34 DAC
Output Noise With Internal Reference 0.1Hz to 10Hz
Figure 5-36 Internal Reference Noise