SLASF62A June   2024  – November 2024 DAC80516

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements - I2C Standard Mode
    7. 5.7  Timing Requirements - I2C Fast Mode
    8. 5.8  Timing Requirements - I2C Fast Mode Plus
    9. 5.9  Timing Requirements - SPI
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagrams
    12. 5.12 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Digital-to-Analog Converter (DAC) Architecture
        1. 6.3.1.1 DAC Register Structure
          1. 6.3.1.1.1 DAC Synchronous Operation
          2. 6.3.1.1.2 DAC Buffer Amplifier
          3. 6.3.1.1.3 DAC Transfer Function
      2. 6.3.2 Internal Reference
      3. 6.3.3 Power-On Reset (POR)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Clear Mode
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
        1. 6.5.1.1 I2C Bus Overview
        2. 6.5.1.2 I2C Bus Definitions
        3. 6.5.1.3 I2C Target Address Selection
        4. 6.5.1.4 I2C Read and Write Operations
        5. 6.5.1.5 I2C General-Call Reset
      2. 6.5.2 Serial Peripheral Interface (SPI)
        1. 6.5.2.1 SPI Bus Overview
  8. 7 Register Map
    1. 7.1 DAC80516 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bipolar Voltage Output
    2. 8.2 Typical Application
      1. 8.2.1 Programmable High-Current Voltage Output Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Initialization Setup
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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発注情報
6.3.1.1.3 DAC Transfer Function

The DAC transfer function is given by Equation 1.

Equation 1. V D A C = D A C I N 2 16   × F S R

where

  • DACIN = decimal equivalent of the binary code loaded to the DAC register. DACIN range = 0 to 216 – 1.
  • FSR = DAC full-scale output for the selected output range. FSR is 2.5V for the 0V to 2.5V range, and 5V for the 0V to 5V range.

The DAC output spans the voltage ranges shown in Table 6-1.

Table 6-1 DAC Data Format
DAC DATA REGISTER DAC OUTPUT VOLTAGE (V)
BINARY HEX 0V TO 5V RANGE 0V TO 2.5V RANGE
0000 0000 0000 0000 0000 0 0
0000 0000 0000 0001 0001 0.000076 0.000038
1000 0000 0000 0000 8000 2.5 1.25
1111 1111 1111 1110 FFFE 4.999847 2.499924
1111 1111 1111 1111 FFFF 4.999924 2.499962