JAJSEF2D June 2013 – December 2021 DAC7760 , DAC8760
PRODUCTION DATA
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
AVDD (AVDD + |AVSS| ≤ 36 V) | 10 | 36 | V | ||
AVSS (AVDD + |AVSS| ≤ 36 V) | –18 | 0 | V | ||
DVDD, Internal regulator disabled | 2.7 | 5.5 | V | ||
Reference input voltage | 4.95 | 5.05 | V | ||
External reference current (REFIN = 5 V, outputs off or IOUT enabled) | 30 | µA | |||
Loop compliance voltage (output = 24 mA)(1) | AVDD – 2 | V | |||
VIH, Digital input high voltage | 2 | V | |||
VIL, Digital input low voltage | 3.6 V < AVDD < 5.5 V | 0.8 | V | ||
2.7 V < AVDD < 3.6 V | 0.6 | ||||
Specified performance temperature | –40 | 125 | °C |