JAJS017N March   2000  – April 2020 DCP020503 , DCP020505 , DCP020507 , DCP020509 , DCP020515D , DCP021205 , DCP021212 , DCP021212D , DCP021515 , DCP022405 , DCP022405D , DCP022415D

PRODUCTION DATA  

  1. 1特長
  2. 2アプリケーション
  3. 3概要
  4. 4Revision History
  5. 5Pin Configuration and Functions
    1.     Pin Functions
  6. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Isolation
        1. 7.3.1.1 Operation or Functional Isolation
        2. 7.3.1.2 Basic or Enhanced Isolation
        3. 7.3.1.3 Continuous Voltage
        4. 7.3.1.4 Isolation Voltage
        5. 7.3.1.5 Repeated High-Voltage Isolation Testing
      2. 7.3.2  Power Stage
      3. 7.3.3  Oscillator And Watchdog Circuit
      4. 7.3.4  Thermal Shutdown
      5. 7.3.5  Synchronization
      6. 7.3.6  Light Load Operation (< 10%)
      7. 7.3.7  Load Regulation (10% to 100%)
      8. 7.3.8  Construction
      9. 7.3.9  Thermal Management
      10. 7.3.10 Power-Up Characteristics
    4. 7.4 Device Functional Modes
      1. 7.4.1 Disable/Enable (SYNC pin)
      2. 7.4.2 Decoupling
        1. 7.4.2.1 Ripple Reduction
        2. 7.4.2.2 Connecting the DCP02 in Series
        3. 7.4.2.3 Connecting the DCP02 in Parallel
  8. 8Layout
    1. 8.1 Layout Guidelines
    2. 8.2 Layout Example
  9. 9Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Support Resources
    4. 9.4 Related Links
    5. 9.5 Trademarks
    6. 9.6 Receiving Notification of Documentation Updates
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1 Layout Guidelines

Due to the high power density of these devices, provide ground planes on the input and output.

Figure 8-4 and Figure 8-2 illustrate a printed circuit board (PCB) layout for the two conventional (DCP01/02, DCV01), and two SOP surface-mount packages (DCP02U). Figure 8-1 shows the schematic.

Including input power and ground planes provides a low-impedance path for the input power. For the output, the COM signal connects via a ground plane, while the connections for the positive and negative voltage outputs conduct through wide traces in order to minimize losses.

The output should be taken from the device using ground and power planes, thereby ensuring minimum losses.

The location of the decoupling capacitors in close proximity to their respective pins ensures low losses due to the effects of stray inductance, thus improving the ripple performance. This location is of particular importance to the input decoupling capacitor, because this capacitor supplies the transient current associated with the fast switching waveforms of the power drive circuits.

Allow the unused SYNC pin, to remain configured as a floating pad. It is advisable to place a guard ring (connected to input ground) or annulus connected around this pin to avoid any noise pick up. When connecting a SYNC pin to one or more SYNC design the linking trace to be short and narrow to avoid stray capacitance. Ensure that no other trace is in close proximity to this trace SYNC trace to decrease the stray capacitance on this pin. The stray capacitance affects the performance of the oscillator.