JAJSD60 April   2017 DCPA10505 , DCPA10505D , DCPA10512 , DCPA10512D , DCPA10515 , DCPA10515D

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Electrical Characteristics
    5. 6.5  Switching Characteristics
    6. 6.6  Typical Characteristics (DCPA10505)
    7. 6.7  Typical Characteristics (DCPA10512)
    8. 6.8  Typical Characteristics (DCPA10515)
    9. 6.9  Typical Characteristics (DCPA10505D)
    10. 6.10 Typical Characteristics (DCPA10512D)
    11. 6.11 Typical Characteristics (DCPA10515D)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Isolation
        1. 7.3.1.1 Operation or Functional Isolation
        2. 7.3.1.2 Basic or Enhanced Isolation
        3. 7.3.1.3 Continuous Voltage
        4. 7.3.1.4 Isolation Voltage
        5. 7.3.1.5 Repeated High-Voltage Isolation Testing
      2. 7.3.2  Power Stage
      3. 7.3.3  Input and Output Capacitors
      4. 7.3.4  Oscillator And Watchdog Circuit
      5. 7.3.5  Synchronization
      6. 7.3.6  SWOUT
      7. 7.3.7  Soft Start
      8. 7.3.8  Load Regulation
      9. 7.3.9  Thermal Performance
        1. 7.3.9.1 Thermal Protection
      10. 7.3.10 Current Limit
      11. 7.3.11 Construction
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Ripple Reduction
      2. 8.1.2 Connecting the DCPA1 in Series
      3. 8.1.3 Connecting the DCPA1 in Parallel
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 DCPA10505 Application Curves
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Capacitor
        2. 8.2.3.2 Output Capacitor
        3. 8.2.3.3 SYNCIN Pin
      4. 8.2.4 PCB Design
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デバイスの項目表記
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 コミュニティ・リソース
    4. 11.4 関連リンク
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Ripple Reduction

The high switching frequency of 425 kHz allows simple filtering. To reduce output voltage ripple, it is recommended that a minimum of 1-µF capacitor be used on the +VOUT pin. For dual output devices, decouple both of the outputs to the COM pin. The required 2.2-µF, low ESR ceramic input capacitor also helps to reduce ripple and noise. See DC-to-DC Converter Noise Reduction (SBVA012).

8.1.2 Connecting the DCPA1 in Series

Multiple DCPA1 isolated 1-W DC/DC converters can be connected in series to provide non-standard voltage rails. This configuration is possible by using the floating outputs provided by the galvanic isolation of the DCPA1 devices by connecting the +VOUT from one DCPA1 to the –VOUT of another as shown in Figure 34. The synchronization feature allows easy synchronization to prevent power-rail beat frequencies at no additional filtering cost.

DCPA10505 DCPA10505D DCPA10512 DCPA10512D DCPA10515 DCPA10515D DCPA1_series.gif Figure 34. Multiple DCPA1 Devices Connected in Series

The outputs of a dual-output DCPA1 device can also be connected in series to provide two times the magnitude of +VOUT, as shown in Figure 35. For example, connect a dual-output, ±15-V, DCPA10515D device to provide a 30-V rail.

DCPA10505 DCPA10505D DCPA10512 DCPA10512D DCPA10515 DCPA10515D DCPA1_dual_series.gif Figure 35. Dual Output Devices Connected in Series

8.1.3 Connecting the DCPA1 in Parallel

If the output power from one DCPA1 is not sufficient, it is possible to parallel the outputs of multiple DCPA1s, as shown in Figure 36, (applies to single output devices only). The synchronization feature allows easy synchronization to prevent power-rail beat frequencies at no additional filtering cost.

DCPA10505 DCPA10505D DCPA10512 DCPA10512D DCPA10515 DCPA10515D DCPA1_parallel.gif Figure 36. Multiple DCPA1 Devices Connected in Parallel

8.2 Typical Application

DCPA10505 DCPA10505D DCPA10512 DCPA10512D DCPA10515 DCPA10515D typ_app_single.gif Figure 37. Typical DCPA10505 Application

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 1 and follow the design procedures shown in Detailed Design Procedure section.

Table 1. Design Example Parameters

PARAMETER VALUE UNIT
V(+VS) Input voltage 5 V
V(+VOUT) Output voltage 5 V
IOUT Output current rating 200 mA
fSW Operating frequency 425 kHz

8.2.2 DCPA10505 Application Curves

DCPA10505 DCPA10505D DCPA10512 DCPA10512D DCPA10515 DCPA10515D DCPA1ON.gif Figure 38. DCPA10505 Turn-ON
DCPA10505 DCPA10505D DCPA10512 DCPA10512D DCPA10515 DCPA10515D DCPA1Off.gif Figure 39. DCPA10505 Turn-OFF

8.2.3 Detailed Design Procedure

8.2.3.1 Input Capacitor

For all DCPA1, 5-V input voltage designs, select a 2.2-μF low-ESR ceramic input capacitor to ensure a good startup performance.

8.2.3.2 Output Capacitor

For any DCPA1 design, select a 1.0-μF low-ESR ceramic output capacitor to reduce output ripple.

8.2.3.3 SYNCIN Pin

In a stand-alone application, it is recommended to connect this pin to the input side common, –VS.

8.2.4 PCB Design

The copper losses (resistance and inductance) can be minimized by the use of mutual ground and power planes where possible. If that is not possible, use wide traces to reduce the losses. If several devices are being powered from a common power source, a star-connected system for the traces must be deployed. Do not connect the devices in series, because that type of connection cascades the resistive losses. The position of the decoupling capacitors is important. They must be as close to the devices as possible in order to reduce losses. See the PCB Layout section for more details.