JAJSHA6B March   2019  – May 2022 DLP2000

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  System Mounting Interface Loads
    9. 6.9  Physical Characteristics of the Micromirror Array
    10. 6.10 Micromirror Array Optical Characteristics
    11. 6.11 Window Characteristics
    12. 6.12 Chipset Component Usage Specification
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Interface
      2. 7.3.2 Control Serial Interface
      3. 7.3.3 High Speed Interface
      4. 7.3.4 Timing
    4. 7.4 Device Functional Modes
    5. 7.5 Window Characteristics and Optics
      1. 7.5.1 Optical Interface and System Image Quality
        1. 7.5.1.1 Numerical Aperture and Stray Light Control
        2. 7.5.1.2 Pupil Match
        3. 7.5.1.3 Illumination Overfill
    6. 7.6 Micromirror Array Temperature Calculation
    7. 7.7 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 7.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 7.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 7.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 7.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Power-Up Procedure
    2. 9.2 Power Supply Power-Down Procedure
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Device Support
      1. 11.2.1 Device Nomenclature
      2. 11.2.2 Device Markings
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 サポート・リソース
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.4 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply Voltage VCC LVCMOS logic power supply voltage(1) 1.65 1.8 1.95 V
VOFFSET Mirror electrode and HVCMOS voltage(1) 8.25 8.5 8.75 V
VBIAS Mirror electrode voltage 15.5 16 16.5 V
Supply voltage delta |VBIAS – VOFFSET| (2) 8.75 V
VRESET Mirror electrode voltage –9.5 –10 –10.5 V
Input Voltage VP Positive going threshold voltage 0.4*VCC 0.7*VCC V
VN Negative going threshold voltage 0.3*VCC 0.6*VCC V
VH Hysteresis voltage (Vp – Vn) 0.1*VCC 0.4*VCC V
Environmental TARRAY Array temperature—long-term operational(3)(4)(5)(6) 0 40 to 70 °C
Array Temperature – short-term operational(4)(7) –20 75 °C
|TDELTA| Absolute temperature difference between any point on the window edge and the ceramic test point TP1(8) 15 °C
TWINDOW Window temperature—operational(3)(9) 90 °C
TDP Dew point temperature (non-condensing) See note(10). °C
ILLUV Illumination wavelength < 400 nm(3) 0.68 mW/cm2
ILLVIS Illumination wavelengths between 400 nm and 700 nm Thermally limited
ILLIR Illumination wavelength > 700 nm 10 mW/cm2
(1) All voltage values are with respect to GND (VSS). VOFFSET, VCC, VBIAS, VRESET, and VSS power supplies are required for the normal DMD operating mode.
(2) To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than 8.75 V.
(3) Simultaneous exposure of the DMD to the maximum Recommended Operating Conditions for temperature and UV illumination reduces device lifetime.
(4) The array temperature cannot be measured directly and must be computed analytically from the temperature measured at test point 1 (TP1) shown in Figure 7-1 and the package thermal resistance in Section 7.6.
(5) Per Figure 6-1, the maximum operational array temperature should be derated based on the micromirror landed duty cycle that the DMD experiences in the end application. Refer to Section 7.7 for a definition of micromirror landed duty cycle.
(6) Long-term is defined as the usable life of the device
(7) Array temperatures beyond those specified as long-term are recommended for short-term conditions only (power-up). Short-term is defined as cumulative time over the usable life of the device and is less than 500 hours for temperatures between the long-term maximum and 75°C, and less than 500 hours for temperatures between 0°C and –20°C.
(8) Temperature delta is the highest difference between the ceramic test point 1 (TP1) and anywhere on the window edge as shown in Figure 7-1.
(9) Window temperature is the highest temperature on the window edge shown in Figure 7-1.
(10) The DLP2000 DMD is intended for use in well controlled, low dew point environments.  Please contact your local TI sales person or TI distributor representative to determine if this device is suitable for your application and operating environment compared other DMD solutions. DLP Products offers a broad portfolio of DMDs suitable for a wide variety of applications.
GUID-A5A429CA-BFEC-4DA1-916B-29E4E0F55D60-low.gif Figure 6-1 Max Recommended Array Temperature—Derating Curve