JAJSP80A November 2022 – September 2023 DLP801RE
PRODUCTION DATA
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VOLTAGE SUPPLY | |||||
VDD | Supply voltage for LVCMOS core logic(1) | 1.65 | 1.8 | 1.95 | V |
VDDI | Supply voltage for LVDS Interface(1) | 1.65 | 1.8 | 1.95 | V |
VCC2 | Micromirror Electrode and HVCMOS voltage(1)(2) | 9.5 | 10 | 10.5 | V |
VMBRST | Micromirror Bias / Reset Voltage(1) | –17 | 21.5 | V | |
|VDD – VDDI| | Supply voltage delta (absolute value)(3) | 0 | 0.3 | V | |
LVCMOS | |||||
VIH(DC) | Input High Voltage | 0.7 × VDD | VDD + 0.3 | V | |
VIL(DC) | Input Low Voltage | –0.3 | 0.3 × VDD | V | |
VIH(AC) | Input High Voltage | 0.8 × VDD | VDD + 0.3 | V | |
VIL(AC) | Input Low Voltage | –0.3 | 0.2 × VDD | V | |
IOH | High-level Output Current | 2 | mA | ||
IOL | Low-level Output Current | –2 | mA | ||
tPWRDNZ | PWRDNZ pulse width(4) | 10 | ns | ||
SCP INTERFACE | |||||
FSCPCLK | SCP clock frequency | 50 | 500 | kHz | |
SCPCLKDCDIN | SCP Clk Input duty cycle | 40% | 60% | ||
LVDS INTERFACE | |||||
FCLOCK | Clock frequency for LVDS interface (all channels), DCLK(5) | 400 | MHz | ||
DCDIN | Input CLK Duty Cycle Distortion tolerance | 44% | 56% | ||
|VID| | Input differential voltage (absolute value)(6) | 150 | 300 | 440 | mV |
VCM | Common mode voltage(6) | 1100 | 1200 | 1300 | mV |
VLVDS | LVDS voltage(6) | 880 | 1520 | mV | |
tLVDS_RSTZ | Time required for LVDS receivers to recover from PWRDNZ | 2 | µs | ||
ZIN | Internal differential termination resistance | 80 | 100 | 120 | Ω |
ZLINE | Line differential impedance (PWB/trace) | 90 | 100 | 110 | Ω |
ENVIRONMENTAL | |||||
TARRAY | Array temperature, long-term operational(8)(10)(11) | 10 | 40 to 70(10) | °C | |
Array temperature, short-term operational, 500 hr max(10)(13) | 0 | 10 | °C | ||
TDP -AVG | Average dew point average temperature (non–condensing)(12) | 28 | °C | ||
TDP-ELR | Elevated dew point temperature range (non-condensing)(13) | 28 | 36 | °C | |
CTELR | Cumulative time in elevated dew point temperature range | 24 | Months | ||
QAP-ILL | Window aperture illumination overfill(14)(15)(16) | 17 | W/cm2 | ||
SOLID STATE ILLUMINATION SINGLE-CHIP ARCHITECTURE | |||||
ILLUV | Illumination power at wavelengths < 410 nm(7)(18) | 10 | mW/cm2 | ||
ILLVIS | Illumination power at wavelengths ≥ 410 nm and ≤ 800 nm(17)(18) | 40 | W/cm2 | ||
ILLIR | Ilumination power at wavelengths > 800 nm(18) | 10 | mW/cm2 | ||
ILLBLU | Illumination power at wavelengths ≥ 410 nm and ≤ 475 nm(17)(18) | 12.8 | W/cm2 | ||
ILLBLU1 | Illumination power at wavelengths ≥ 410 nm and ≤ 440 nm(17)(18) | 2 | W/cm2 | ||
SOLID STATE ILLUMINATION MULTI-CHIP ARCHITECTURE (19) | |||||
ILLUV | Illumination power at wavelength < 410 nm(7)(18) | 10 | mW/cm2 | ||
ILLVIS | Illumination power at wavelengths ≥ 410 nm and ≤ 800 nm(17)(18) | 40 | W/cm2 |
||
ILLIR | Illumination power at wavelength > 800 nm(18) | 10 | mW/cm2 | ||
ILLBLU | Illumination power at wavelengths ≥ 410 nm and ≤ 475 nm(17)(18) | 22 | W/cm2 | ||
ILLBLU1 | Illumination power at wavelengths ≥ 410 nm and ≤ 440 nm(17)(18) | 2 | W/cm2 |