JAJSEU8D February 2018 – October 2020 DLPC3432
PRODUCTION DATA
The DLPC34xx test point output port, TSTPT_(7:0), provides selected system calibration and controller debug support. These test points are inputs when reset is applied. These test points are outputs when reset is released. The controller samples the signal state upon the release of system reset and then uses the captured value to configure the test mode until the next time reset is applied. Because each test point includes an internal pulldown resistor, external pullups must be used to modify the default test configuration.
The default configuration (b000) corresponds to the TSTPT_(2:0) outputs remaining tri-stated to reduce switching activity during normal operation. For maximum flexibility, a jumper to external pullup resistors is recommended for TSTPT_(2:0). The pullup resistors on TSTPT_(2:0) can be used to configure the controller for a specific mode or option. TI does not recommend adding pullup resistors to TSTPT_(7:3) due to potentially adverse effects on normal operation. For normal use TSTPT_(7:3) should be left unconnected. The test points are sampled only during a 0-to-1 transition on the RESETZ input, so changing the configuration after reset is released does not have any effect until the next time reset asserts and releases. Table 7-8 describes the test mode selections for one programmable scenario defined by TSTPT_(2:0).
TSTPT OUTPUT VALUE(1) | NO SWITCHING ACTIVITY | CLOCK DEBUG OUTPUT |
---|---|---|
TSTPT_(2:0) = 0b000 | TSTPT_(2:0) = 0b010 | |
TSTPT_0 | HI-Z | 60 MHz |
TSTPT_1 | HI-Z | 30 MHz |
TSTPT_2 | HI-Z | 0.7 to 22.5 MHz |
TSTPT_3 | HI-Z | HIGH |
TSTPT_4 | HI-Z | LOW |
TSTPT_5 | HI-Z | HIGH |
TSTPT_6 | HI-Z | HIGH |
TSTPT_7 | HI-Z | 7.5 MHz |