JAJSU19
April 2024
DLPC7530
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Power Electrical Characteristics
5.6
Pin Electrical Characteristics
5.7
DMD HSSI Electrical Characteristics
5.8
DMD Low-Speed LVDS Electrical Characteristics
5.9
V-by-One Interface Electrical Characteristics
5.10
FPD-Link LVDS Electrical Characteristics
5.11
USB Electrical Characteristics
5.12
System Oscillator Timing Requirements
5.13
Power Supply and Reset Timing Requirements
5.14
DMD HSSI Timing Requirements
5.15
DMD Low-Speed LVDS Timing Requirements
5.16
V-by-One Interface General Timing Requirements
5.17
FPD-Link Interface General Timing Requirements
5.18
Parallel Interface General Timing Requirements
5.19
Source Frame Timing Requirements
5.20
Synchronous Serial Port Interface Timing Requirements
5.21
Controller and Target I2C Interface Timing Requirements
5.22
Programmable Output Clock Timing Requirements
5.23
JTAG Boundary Scan Interface Timing Requirements (Debug Only)
5.24
JTAG ARM Multi-Ice Interface Timing Requirements (Debug Only)
5.25
Multi-Trace ETM Interface Timing Requirements
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Input Sources
6.3.2
Processing Delays
6.3.3
Parallel Interface
6.3.4
FPD-Link Interface
6.3.5
V-by-One Interface
6.3.6
DMD (HSSI) Interface
6.3.7
Program Memory Flash Interface
6.3.8
GPIO Supported Functionality
6.3.9
Debug Support
6.4
Device Operational Modes
6.4.1
Standby Mode
6.4.2
Active Mode
6.4.2.1
Normal Configuration
6.4.2.2
Low Latency Configuration
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
8
Power Supply Recommendations
8.1
Power Supply Management
8.2
Hot Plug Usage
8.3
Power Supplies for Unused Input Source Interfaces
8.4
Power Supplies
8.4.1
1.15-V Power Supplies
8.4.2
1.21V Power Supply
8.4.3
1.8-V Power Supplies
8.4.4
3.3-V Power Supplies
9
Layout
9.1
Layout Guidelines
9.1.1
General Layout Guidelines
9.1.2
Power Supply Layout Guidelines
9.1.3
Layout Guidelines for Internal Controller PLL Power
9.1.4
Layout Guideline for DLPC7530 Reference Clock
9.1.4.1
Recommended Crystal Oscillator Configuration
9.1.5
V-by-One Interface Layout Considerations
9.1.6
FPD-Link Interface Layout Considerations
9.1.7
USB Interface Layout Considerations
9.1.8
DMD Interface Layout Considerations
9.1.9
General Handling Guidelines for Unused CMOS-Type Pins
9.1.10
Maximum Pin-to-Pin, PCB Interconnects Etch Lengths
9.2
Thermal Considerations
10
Device and Documentation Support
10.1
Device Support
10.1.1
サード・パーティ製品に関する免責事項
10.1.2
Device Nomenclature
10.1.2.1
Device Markings
10.1.2.2
Package Data
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
10.6.1
Video Timing Parameter Definitions
11
Revision History
12
Mechanical, Packaging, and Orderable Information
92
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ZDC|676
MPBGAP5
サーマルパッド・メカニカル・データ
発注情報
jajsu19_oa
9.1
Layout Guidelines