JAJST20A March 2024 – September 2024 DLPC964
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Bit(s) | Description | Reset | Type | Notes |
---|---|---|---|---|
0 | Fieldname: DMUX_STATUS_FLD | 0x0 | r | |
‘1’: A DMD Interface Sync error has occurred. Once this bit is set, can only be cleared by writing to register 0x40000024 | ||||
‘0’: A DMD Interface Sync error has not occurred. | ||||
31:1 | UNUSED | 0x0 |