JAJST20A March 2024 – September 2024 DLPC964
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Bit(s) | Description | Reset | Type | Notes |
---|---|---|---|---|
0 | Fieldname: PRBS7_M0LN0_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 0 test passed | ||||
'0' = test failed | ||||
1 | Fieldname: PRBS7_M0LN1_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 1 test passed | ||||
'0' = test failed | ||||
2 | Fieldname: PRBS7_M0LN2_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 2 test passed | ||||
'0' = test failed | ||||
3 | Fieldname: PRBS7_M0LN3_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 3 test passed | ||||
'0' = test failed | ||||
4 | Fieldname: PRBS7_M0LN4_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 4 test passed | ||||
'0' = test failed | ||||
5 | Fieldname: PRBS7_M0LN5_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 5 test passed | ||||
'0' = test failed | ||||
6 | Fieldname: PRBS7_M0LN6_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 6 test passed | ||||
'0' = test failed | ||||
7 | Fieldname: PRBS7_M0LN7_TEST_RESULT_FLD | 0x0 | r | |
'1' = DMD Macro 0 lane 7 test passed | ||||
'0' = test failed | ||||
31:8 | UNUSED | 0x0 |